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Hello CommunityThis is my first post here, and I have started learning about the STM32G4xx processors. So I might very well have got something wrong here. I like to ask about a detail in the pin-out picture of the STM32G431 Nucleo64 board in STM32CubeMX software. When I look at the schematics for this Nucleo board, it seems that the PA5 pin can activate the LD2 LED and not the LD1. I guess, that for the typical beginner start blink software, you normally use LD2. When I look at the same picture for the NUCLEO64 STM32G474 board, this PA5 pin activate LD2.The same pin is used for input to an OP-AMP. Would it be possible to use it if you disconnect the SB6 jumper?

Hello:Observation (empirical, multiple boundaries confirmed):When placing DMA linked list nodes (36 bytes each = 9 words) sequentially in SRAM1,if a single node spans certain addresses, the GPDMA channel enters DTEF statewhen fetching that node. Confirmed problematic boundaries in SRAM1 (192KB, 0x20000000 - 0x2002FFFF):- 0x20010000 : crossing FAILS- 0x20020000 : crossing FAILS Both boundaries appear at 64KB intervals within SRAM1, which suggeststhat SRAM1 may be internally organized as multiple 64KB blocks/banks. Test cases:Test 1: Node array starting at 0x20011A54 (natural placement)- Nodes 1-1633: within bank containing 0x20010000-0x2001FFFF → OK- Node 1634: spans 0x2001FFF8 - 0x2002001C → FAILS (crosses 0x20020000) Test 2: Node array starting at (0x20010000 - 44)- The first node spans 0x2000FFD4 - 0x2000FFF8 (OK)- The second node spans 0x2000FFF8 - 0x2001001C → FAILS (crosses 0x20010000) Test 3: Node array starting at (0x20010000 - 36)- The first node ends exactly at 0x20010000- No

Thank you for your replies. Good for me to know, that this marking should have been LD2. I wondered that, I may had got something else wrong about this. It seems to me, that CubeMX assumes, that the SB6 jumper is installed, so you cannot use CubeMX to set the PA5 as input for OPAMP2. But I guess, that you can use some HAL function to do it. Am I right?   CubeMx doesn’t care if SB6 is soldered or not. So remove SB6 and configure PA5 for OPAMP function either in CubeMx or using directly the HAL. When I look the PIN-out view, PA5 is marked red. When I look the reference manual about OPAMPS:Then it seems possible to have OPAM2 use PA5. In CubeMX I look at OPMP2 mode pull down menu, you got “Standalone Internally connected_IO”. But it is marked red and cannot be selected.Post split from this thread for a newer question.

Hi, I’m looking into the WL55JC1 for a project which would require the system to remain dormant (ideally standby) for weeks, maybe months and then resume operation on a set date at a set time. I would like to use LSI as power and space will be very limited.So far I’ve discovered, that of course there is an RTC and it has alarms that can be used to wake from standby mode. However all examples and documentation I can find only ever use times or maybe day-of-week or day-of-month as the set wake up time. Never a full date and time. Looking at the code, stm32wlxx_hal_rtc.h defines a struct RTC_AlarmTypeDef with fields for seconds, minutes, hours and either a day-of-month, or day-of-week.Is it really not possible to give the system a full a date and time yyyy-mm-dd and hh-mm to wake up at? Will I need to build workaround waking up at least once a month to recalculate the next wake-up until the actual target time is within the same calendar month?Or am I overlooking something?I’d appreciate a

Hello everyone, I can run my model through the stedgeai / STM32Cube AI Studio and see the following: But when I now go into the resulting application and build it myself, I see these memory sections, which tell a totally different story: How can I fix this? I added the AXISRAMx sections (they are not provided per default) which results in them being used by 0%, so that also can’t be right. Best regards, rphii

why while creating new project in stm32cubemx, it  show like this error downloading the following files crdb.zip?download has failed ,some data may not be updated,please retry later. how to solve it?

custom board, The USB D+ and D− lines are connected directly from the MCU to the USB Type-B connector, with no intermediate components. There is no pull-up resistor on the D+ line, as I understand that the MCU provides the pull-up internallyAs far as I know, the stm32u595 supports USB High-Speed using its internal PHY.CubeMX Version: 6.18.0Reference project:https://github.com/STMicroelectronics/STM32CubeU5/tree/main/Projects/STM32U5G9J-DK2/Applications/USBX/Ux_Device_CDC_ACMI configured my .ioc file to match the reference project as closely as possible. UART is not used.Issue:I implemented a simple CDC ACM echo function to verify USB communication.In Full-Speed (FS) mode, the echo function works correctly. The PC recognizes the device, and both transmit and receive operate normally. In High-Speed (HS) mode, however, the PC does not recognize the USB device at all (it reports an unknown or unrecognized USB device), so communication cannot be established.What could I be missing, or what

Hi all, i am just trying to figure out how to connect the Stwinbox board with Rs485. if you have any advice in terms of applications i must use and the recommended firmware?  regards

I'm trying to disconnect a ethernet cable after flashing a code Then I'm getting [00:01:50.522,000] <err> net_tcp: net_send_data()[00:01:52.200,000] <wrn> net_if: iface 1 is down[00:01:52.200,000] <err> net_tcp: net_send_data()[00:01:52.480,000] <wrn> net_if: iface 1 is down[00:01:52.480,000] <err> net_tcp: net_send_data()[00:01:52.900,000] <wrn> net_if: iface 1 is down[00:01:52.900,000] <err> net_tcp: net_send_data()[00:01:53.530,000] <wrn> net_if: iface 1 is down[00:01:53.530,000] <err> net_tcp: net_send_data()[00:01:54.475,000] <wrn> net_if: iface 1 is downThis is expected since trying to connect it backWhen I reconnect ethernet cable Im getting an below error [00:01:54.475,000] <wrn> net_if: iface 1 is down[00:01:54.475,000] <err> net_tcp: net_send_data()[00:01:55.282,000] <inf> phy_mii: PHY (0) Link speed 100 Mb, full duplex[00:01:56.212,000] <err> os: ***** USAGE FAULT *****[00

Dear team, hello, I've drawn a power supply circuit diagram for the STM32F051R8T6 but I'm a little hesitant. The diagram of my circuit is below. Have I done it correctly? Thank you for your answer. 

Hello, I have an STM32H573 project with TrustZone enabled. After the CPU goes into non-secure mode and during execution of the HAL_Init() function (more specifics below) a hard fault occurs. There is only a hard fault during the execution from a non-secure state. In the secure state (at boot) the HAL_Init() function successfully runs. Is there a configuration for the RCC not enabled by default that I a missing, allowing it to be accessed by both Secure and Non-Secure CPU states?Within GTZC_S TZSC - Privilegeable peripherals I cannot enable it. I see no relevant settings (I have tested a few that might be loosely related but no solved) in RCC. In the code below I have used an arrow (<--) to denote exactly where the hard fault occurs (Verified with debugger)Non-Secure Entry Code (CubeMX Generated):int main(void){ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* MPU Configuration-------------------------

Hello, I may be missing something, I cant generate the SPI_init() method within main() (also pins are yellow ?)…I have generated;  HAL_Init(); /* Configure the system clock */ SystemClock_Config(); /* Initialize all configured peripherals */ MX_GPIO_Init(); Cheers

Hello,I have completed this guide successfully:How to integrate TouchGFX and camera middleware on an STM32N6570-DK However, I am running into an issue when I try to add SDMMC2 or ETH in the .ioc.  After I generate code then build in the IDE, I get the below error: C://TouchGFXProjects/VisionControlboard2/FSBL/Core/Src/main.c:334:(.text.startup.main+0x12c): undefined reference to `HAL_SD_Init'C:/ST/STM32CubeIDE_2.0.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/bin/ld.exe: (HAL_SD_Init): Unknown destination type (ARM/Thumb) in ./Application/User/Core/main.oC://TouchGFXProjects/VisionControlboard2/FSBL/Core/Src/main.c:334:(.text.startup.main+0x12c): dangerous relocation: unsupported relocationProject in link below:https://app.box.com/s/bdbyzi5eqvqhgib90klxgehmhs8pkynsWhat is the best method to get this resolved?  I am using STM32CubeIDE Version 2.1.1

Hi everyone,I'm using STM32 Cube Programmer CLI to port an SBSFU example to STM32U5G9 platform (from U585). Other than shell script mess and no IOC files in this examples, I've managed to port the example and run it by using ST Link programmer under both Linux and Windows.The problem is that the newest release 2.20 has its J-Link functionality completely broken in Linux (I'm using Kubuntu 22.04 and 24.04, also tested in regular Ubuntu). Any command to STM32_cube_programmer_CLI ends up with:Error: Could not connect to the J-Link/Flasher, Library not found !The underlying issue is that libjlinkarm.so is not linked to the CLI executable: ldd shows it's linked for older versions, but no linkage for v2.20. I'm guessing this has happened since ST was finally moving away from weird versioned so names to non-versioned so's: i.e. libjlinkarm.so.7 -> libjlinkarm.soI'm hoping that someone from ST will read this message since the issue is not possible to resolve without re-linking... So @s

Hi,I would like to ask whether support for the STM32C5 family is planned in the STM32 Motor Control SDK (MC-SDK).If so, could you please provide an indication of the expected release timeframe or roadmap for its integration?We are currently evaluating STM32 devices for a motor control application and would like to understand whether STM32C5 family will be officially supported by the MC-SDK in the near future.Thank you in advance for your support.Best Regards

Hi,we have a question regarding the Secure Manager Internal Trusted Storage size on the STM32H73 series.We have configured the following options:external flash profile 0 secure modules (=SMAK_0 ?)According to UM3254 it is our understanding the ITS size can now be up to 56 Kbyte:Our application project.py prebuild seems to extract value “9”, which means 9 * 8 Kbyte (Flash sector size) = 72 Kbyte? Jul  8 13:27:10 2026 : [INF] Searching the parameter with <Name>ITS size</Name> element2026-07-08 13:27:10,542 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] Parameter found. Verifying information of '<Value>0x9</Value>'2026-07-08 13:27:10,543 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] The modification is not necessary2026-07-08 13:27:10,543 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] The tag <Value> has already the correct content (0x9) Is there a misunderstanding on our end about the profile, memory configuration, UM3254 table, the prebuild proccess or the conversion

Hi everyone,I am new to the MCSDK environment and currently working on a porting project from MCSDK 5.4.8 to 6.4.1. I have been stuck on this for weeks and I am honestly getting desperate as I cannot find a way forward.I need a functional routine to handle encoder alignment that is compatible with the 6.4.1 framework. The alignment must be performed solely upon user request, and it is critical that the motor does not start running after the alignment sequence. I am looking for a direct replacement for the legacy MCAlignEncoderMotor1() API.I have already attempted the implementation suggested in this thread: MCSDK 6.3 - Correct way to restart / retrigger encoder alignmentUnfortunately, this solution does not work for my setup. Could you please provide guidance on how to trigger this alignment in isolation within the 6.4.1 architecture?Best regards,bolla_bo

Hello,I am working on a design incorporating the STM32U3C5CIU6Q in SMPS mode. This package includes two VDD11 pins. I am having trouble interpreting the datasheet when it comes to the number of inductors I will need. This note under Figure 24 in the datasheet is clear that each pin will need a capacitor to VSSSMPS, but it seems like it could also imply that each VDD11 pin requires its own inductor between VLXSMPS.The power supply scheme (with SMPS) is also not clear to me: This section seems more like it is expecting a single inductor:Am I okay to use a single inductor between the VLXSMPS pin and VD11 node, with each VD11 pin having its own capacitors, or should I treat each VD11 as a separate loop with its own inductor as well?Thanks for any help!

In RM0481 rev 4 April 2025 I find the following text:7.6.8 Write protectionA write-protected group of sectors cannot be erased nor programmed. As a result, a bankerase cannot be performed if one group of sectors is write-protected, unless a NVSTATEtransition to OPEN is triggered (erasing the whole user flash memory). It is not clear what NVSTATE is in this context. Is this a left-over from documentation of a different MCU? I don’t think it is PRODUCT_STATE. Because to my understanding you can have a PRODUCT_STATE > OPEN and not enable TrustZone and then write to FLASH_WRP1R_PRG to turn off write protection - you should be able to do a bank erase on bank 1. You can set initial values with an OB but I can’t see any documentation that this also makes changing FLASH_WRP1R_PRG illegal and the relevant OBs are not protected by PRODUCT_STATE the same way as e.g. SECWM and HDP.Same reasoning for flash bank 2.And if you enable TrustZone, it is stated that FLASH_WRP[1, 2]R_PRG is non-secure.

Hello ST Community,I am evaluating the security features of the STM32H733 (Cortex-M7) for a project that uses:A custom bootloader stored in internal flash The main application stored and executed from external QSPI/Octo-SPI flashI have the following questions regarding Secure Firmware Install (SFI):Is SFI for internal flash officially supported on the STM32H733? (I saw it was added in AN4992 Rev 8, but I would like official confirmation.) Is SFI for external flash (SFIx) supported on the STM32H733? Specifically, can the secure bootloader (RSS) decrypt and program the external application image securely during manufacturing, or is only the "host-side encryption + internal firmware configures OTFDEC" method available? If external SFIx is not supported, what is the recommended secure manufacturing flow for a design with main code in external flash?

Hi.I’m working on a custom board with a C551VET6 and trained on a NUCLEO_C562RE with ADC. I attempted the conversion in polling mode in several ways (mode=single + discountinuous=disabled  /  mode=continuous + discountinuous=3ranks) by varying the implementation of the FOR loop (including or excluding the calls to HAL_ADC_REG_StartConv and HAL_ADC_REG_PollForConv according to the selected mode); no matter what I did, as soon as I needed to convert 3 or more channels, only the first two showed distinct values, while all the other channels in the sequencer returned a value identical to that of the second channel.I found no example using more than 2 channels in a basic regular sequencer. Have you tried it at ST ?By the way, I’m working with a CTN temperature sensor and two HDC3120 giving both temperature and humidity, thus 5 channels in my case.Do I need to lower the resolution or something when the number of channel increases ?I’m not familiar with ST community mechanisms, shall I open a

Hi,I am trying to connect SDRAM AS4C16M16SB from Alliance Memmory to STM32N655X0 MCU, but i did not find any reccomended connection. I am “pinned” this memorry to MCU according STM32Cube MX software and MCU datasheet. But there is not much more information about “autoprecharge” function. Only in reference manual RM0486 is small note “The AutoPrecharge is not supported. However, FMC_A[10] must be connected to SDRAM A[0]”. But the memmory has dual function on the address 10 pin (address 10 + AP). Do you have some recommendation how this memmory connect to STM32N655X0 MCU, or is it suitable for this MCU?Below is my wiring diagram, in purple are FMC signals corresponding with pins on MCU. Is it right or am I must somehow reroute the address signal signal (A10)?Thanks a lot. R. 

Hi, Is there mistake between reference manual RM0486 and RM0090 in section SDRAM adress mapping?Where in RM0486 is: "When interfacing with a 16-bit memory, the FMC internally uses the ADDR[11:1] internal address lines to generate the external address. When interfacing with a 32-bit memory, the FMC internally usesADDR[12:2] lines to generate the external address. Whatever the memory width, FMC_A[0] has to beconnected to the SDRAM A[0].The AutoPrecharge is not supported. However, FMC_A[10] must be connected to SDRAM A[0]"In RM0090 is: "When interfacing with a 16-bit memory, the FMC internally uses the HADDR[11:1] internal AHB addresslines to generate the external address. When interfacing with a 32-bit memory, the FMC internally usesHADDR[12:2] lines to generate the external address. Whatever the memory width, FMC_A[0] has to beconnected to the external memory address A[0]. The AutoPrecharge is not supported. FMC_A[10] must be connected to the external memory address A[10] but it is alwa

1. Is it possible to install two versions of STM32CubeIDE (e.g., 1.9.0 and 1.19.0 or 1.19.0 and 2.2.0) on one PC (Windows)?   If so, can I run both versions simultaneously?    If so, can I program two microcontrollers simultaneously with two programmers?2.Is it possible to install STM32CubeIDE and STM32CubeIDE for VS Code on one PC (Windows)?   If so, can I run both versions simultaneously?    If so, can I program two microcontrollers simultaneously with two programmers?