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I’m using the MB1293 USB dongle as a daughter board for a project & am after the dimension between the 2 edge headers as I need to create a footprint on the main board. Is this information available, I’d rather not trust on manual measurement. See below,  

Hello,I am working with an STM32L475RET and have encountered an unexpected behavior with the ADC reference voltage.My hardware configuration is the following:VDDA and VREF+ are tied together and supplied with a precise 2.5V reference. The ADC is configured for 12-bit conversions. The 2.5V reference has been verified with a multimeter and is stable. ADC clock source is set to 48MHzWhen measuring several analog input voltages, the ADC results consistently do not match the expected values assuming a 2.5V reference. I found that the measured ADC values correspond much more closely to an effective reference voltage of approximately 2.62V rather than 2.5V. To further investigate, I measured the internal VREFINT channel and compared the ADC result against the value expected from the datasheet, and assuming a 2.5V reference, the VREFINT result (1.167V) does not match the expected value:Using this initial config for the ADC:/** * @brief ADC1 Initialization Function * @param None * @retval No

Hey guys i have been using Stm32 Model Zoo repo as a base for my application development . After building a appli i want to dive deep into FSBL and optimize bootup time of stm32n6 . But the model zoo repo comes with pre compiled hex file as FSBL rather than a FSBL project . Is there any way to replace the hex file with a actual FSBL project ? 

Dear ST Support Team / Community Engineers,I am currently integrating the ST25DV04KC into my design. The VCC and LPD pins are connected to an MCU, which controls the transition between normal operation and ultra-low power mode.During testing, I observed an abnormal voltage behavior on the LPD pin:System Voltage: 3.1V Pull-up Resistor: 4.7kΩ (External) Issue: During the level switching transition, the LPD pin voltage stalls at an intermediate level of approximately 2.1V, instead of rising cleanly to VCC. This intermediate voltage persists long enough to potentially cause logic uncertainty for the MCU.Troubleshooting Steps Taken:Reduced Pull-up Resistance: I replaced the 4.7kΩ resistor with a 1.2kΩ resistor. This change successfully eliminated the intermediate voltage plateau, and the signal now transitions correctly. VCC Disconnection Test: I also noticed that disconnecting the VCC supply seems to eliminate this phenomenon as well.My Questions:What is the physical mechanism causing this

BOARD: STM32H743IITXACTICLE FOLLOWED: https://community.st.com/t5/stm32-mcus/how-to-implement-a-usb-device-composite-in-stm32h5/ta-p/708078Hello everyone,I was trying to use USB CDC+MSC in composite mode. After following the article mentioned above, i was able to build the project. But after running i was able to only get MSC (as shown in pc) and getting the CDC port with windows error 10.Few things i have changed, in usbd_desc.c updated these lines   0xEF, /* bDeviceClass */ 0x02, /* bDeviceSubClass */ 0x01, /* bDeviceProtocol */ Also i have updated CDC_IN_EP, CDC_OUT_EP, CDC_CMD_EP so it should not match MSC_EPIN_ADDR and MSC_EPOUT_ADDR     #ifndef CDC_IN_EP #define CDC_IN_EP 0x82U /* EP1 for data IN */ #endif /* CDC_IN_EP */ #ifndef CDC_OUT_EP #define CDC_OUT_EP 0x02U /* EP1 for data OUT */ #endif /* CDC_OUT_EP */ #ifndef CDC_CMD_EP #define CDC_CMD_EP 0x83U /* EP2 for CDC commands */ #endif /* CDC_CMD_EP */ #ifndef MSC_EPIN_ADDR #define MSC_EP

I was trying to configure ethernet on my android phone via using usb cdc ncm on stm32 nucleo U5A5 and i was unable to see the ethernet option in the network settings of the phone.It was completely greyed out. I tried the same on ios and i was able to connect via ethernet. What am i supposed to do to resolve this ?im using ncm of tiny usb for this connectivity.

Can we flash same hex file in STM32xxxxVJT6 and STM32xxxxVJT3.

I’ve trawled through several CRC-related threads without finding an explanation of this: How to properly set up bit reversal.Normally, I use CRC-16 XMODEM, which uses the 0x1021 polynomial and no bit reversal. This works perfectly fine when I use this code:void xmodemCalcCRC (uint8_t Data, uint16_t *CRCVal){ CRC->POL = 0x1021; // CRC polynomial CRC->INIT = *CRCVal; // Previous CRC result CRC->CR = CRC_CR_POLYSIZE_0; // 16-bit polynomial *(__IO uint8_t*)(&CRC->DR) = Data; // Feed an 8-bit value into the algorithm *CRCVal = CRC->DR; // Read the result}The reason I set the polynomial, the initial value and configuration every time is to accommodate different CRC methods in the same application.Now, in a current project (using an STM32L433 microcontroller) I need to use CRC-16 Kermit as well. According to crccalc.com, Kermit CRC uses bit reversal on input and output. This is where my trouble begins: When bit revers

Dear ST Team,I am following the STM32 wiki guide:https://wiki.st.com/stm32mcu/wiki/Security:How_to_start_with_STM32CubeMX_STiRoT_Boot_path_on_STM32H57While working through the steps, I encountered an issue with STM32CubeMX.The Boot Path and Debug Authentication configuration pages are blank and do not display the expected options shown in the tutorial. Because of this, I am unable to continue.STM32CubeMX Version: 6.18.1 Could you please advise how to resolve this issue?Thank you for your support.Best regardsRJ

I would like to move the project from:C:\ST\STM32Cube_FW_WB_V1.24.0\Projects\P-NUCLEO-WB55.Nucleo\Applications\BLE\BLE_HeartRateFreeRTOSto:C:\Projects\Myprojectso that I can make modifications at will and not worry about corrupting the original code. At the same time, I want all the libraries, etc. to fall under the same directory as the new code will eventually be submitted to version control.How can I do this?Note: All my other projects under the C:\Projects directory were started with CubeMX and all seem to do as I want.

This is a feature request.In HAL2, we can configure an STM32CubeMX2 project to use User Data pointers (pointers managed only by the application, not the HAL2 library). E.g. setting USE_HAL_UART_USER_DATA to 1 will add the field `const void *p_user_data;` to hal_uart_handle_t.This pointer can be added to other handles: timers, SPI, I2C, FLASH, …I would the pointer to be a pointer-to-mutable, or in other words to remove the “const” from p_user_data. If this is not possible/wanted by ST, please let me know why it was designed like this. I am personally using this pointer to keep track of the amount of successful read/write and errors for UART communication, so it points to a custom-defined structure that is non-const.

I have inherited a legacy H bridge motor control hardware and firmware based on L99H01 (I think L99H02 might be drop in replacement). I’m a firmware developer - not a hardware designer, and I’m new to motor control, so I’m familiarizing myself with the hardware and firmware, and I’m having a “how can this have ever worked” moment.The TS/ACT_OFF pin is not connected (floating). The value 0xC4 is written to REG3 by the firmware.EXT_TS-bit = high (thermal sensor interface), and EXTTH[5:0] is set to 000100b (n=7, m=3) , givingVth = 7* (0.31 + 3*0.03) = 2.8V.Vcc is 3.3V.Apparently this design has functioned correctly for over 10 years, but since we will shortly be spinning a new board and porting the firmware to a new (ST) MCU I’d like to understand if there is a fundamental problem with this design.  All of the original hardware and firmware developers are long departed (probably retired 😑).Thanks in advance if for any feedback.   

Hi.I'm trying out new STM32N6 Nucleo board. It has cmera interfaces, so I wanted to try some examples with the camera.My usual routine for quickstarting some new STM32 product was to download CubeMX package for it, go to Repository folder -> Projects -> [board] -> Applications or Examples, and run an exaple project. But I didn't find any example neather for Nucleo nor other boards.Where can I find camera examples for NUCLEO-N657 board?Thanks.

In Table 7.4, "Low-power mode wake-up timings on LDO" of the datasheet, there is no mention of the FSTEN setting in the conditions for twu(stop3)​ (wake-up in SRAM2). When waking up in SRAM2, is the wake-up time typ. 22.5 μs at MSI=24MHz regardless of the FSTEN setting?

I am trying to configure the clock for the STM32L496 microcontroller, as shown in the screenshot below.I would like to use MSI in PLL mode with the LSE. When I configure the LSE in CubeMX, the 'MSI Auto Calibration' option disappears. When the LSE is disabled, the option is visible, but it cannot be enabled.Please tell me how to correctly configure MSI in PLL mode with the LSE in CubeMX.

Hi,Could you please share example for using IIS2MDCTR via SAI on STM32U385.Thanks

We are testing the best position for a VL53L5CX sensor in our product. We are observing unusual behavior and are not sure how the sensor should be calibrated in this setup.The sensor is mounted on the wall of a movable square housing and points inward. When the housing is positioned directly above a metal box, it appears that crosstalk affects the measurements in all 64 zones.We do not have the cover glass installed yet, but we will add it to the final product.How should the crosstalk calibration be performed in this situation?The vl53l5cx_plugin_xtalk allows a minimum calibration target distance of 600 mm. Therefore, should we perform the calibration outside the final assembly, using the actual cover glass and a target at 600 mm? Or should the calibration be performed with the sensor in its final mechanical position?There is another interesting observation: when the housing is positioned directly above the metal box, the crosstalk effect affects all 64 zones. However, when we raise th

Hi all,Are these available for these samples? I am working on some secure boot devices and would like to try these chips as I am familiar with the STM32 ecosystem. Are you guys have any suggestion which NUCLEO can use for secure-boot purpose?I see there are NUCLEO-H5xx are designed for hardware crypto, sample project and we can build for chain of trust from these family chips?Please let me know, thank you.

Hi everyone,I am working on a dual-core project using the STM32H757Xi and running into an issue with STM32CubeMX regarding NVIC interrupt assignment for the Cortex-M4 core.Here is my setup and the problem I am facing: Microcontroller: STM32H757Xi Toolchain: STM32CubeIDE v1.19 Goal: Configure two Memory-to-Memory (M2M) DMA channels assigned to and running on the Cortex-M4 core. Issue details: In CubeMX (under System Core -> DMA), I created two M2M channels: DMA2 Stream 6 and DMA2 Stream 7. I also tested the exact same configuration using DMA1 Stream 6 and DMA1 Stream 7. In both cases, when I check the NVIC settings, the Interrupt Request (IRQ) checkboxes and priority settings for these streams are only active under NVIC1 (Cortex-M7). Under NVIC2 (Cortex-M4), the corresponding IRQ checkboxes are completely greyed out and disabled. Because CubeMX thinks these interrupts belong to NVIC1, it generates the DMA interrupt handlers in stm32h7xx_it.c for the M7 core context instead of

Hi,I am using the STM32H745I-DISCO board and trying to boot an application from the external QSPI flash (MT25QL512ABB).For this purpose, I created two separate projects: Bootloader Project Initializes the QSPI flash. Configures the QSPI in Memory-Mapped mode. Jumps to the application stored in the external QSPI flash. Application Project Modified the linker script (.ld file) to change the application start address from 0x08000000 to 0x90000000. Added the following statements in CM7/Common/Src/system_stm32h7xx.c (around lines 295–296) inside SystemInit(): As a basic test, the application code is only trying to blink the LED connected to GPIO Pin 13 after booting from the QSPI flash. RCC->CFGR = 0; SCB->VTOR = QSPI_BASE;After building the application, I generated the .bin file and programmed it into the QSPI flash using STM32CubeProgrammer.When I read back the contents from address 0x90000000 using CubeProgrammer, I can see valid data programmed in the fla

I've just installed CubeMX2 to start work on a new project using STM32C552xxx.My normal practice is to export a .csv of all the processor pins along with the alternate functions and in CubeMX this is easy.But Cube MX2 only exports a .csv like this:Position Pin Type Signals Pin labels 1 PE2 gpio     2 PC13 gpio     3 PC14-OSC32_IN(OSC32_IN) gpio     Please tell me there is an option to list all the alternate functions in the.csv.It is quite impossible to to allocate the pins and peripherals for a new design working only with the pop_up detail view in CubeMX2. An acceptable alternative would be for ST to just publish such a .csv some where.MK

I am attempting to exist from a Shutdown mode using the WKUP6 pin (PB5) on an STM32G0B1CEU.This is my shutdown code.HAL_SuspendTick();__HAL_RCC_PWR_CLK_ENABLE();HAL_PWREx_EnableGPIOPullUp(PWR_GPIO_B, PWR_GPIO_BIT_5);HAL_PWREx_EnablePullUpPullDownConfig(); // sets the APC bit in PWR_CR3HAL_PWREx_EnablePORMonitorSampling();HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN6_LOW);// Do reads of registers to ensure they were written(void)PWR->CR3;(void)PWR->CR4;/* Clear all related wakeup flags*/__HAL_PWR_CLEAR_FLAG(PWR_FLAG_WUF);HAL_PWREx_EnterSHUTDOWNMode();This seems to do almost exactly what I would expect it to do.PB5 goes high.Power consumption drops.However, it never wakes up.  I have a wire connected to PB5, which I am measuring with a scope, and confirm that it is going high.  I am them shorting that wire to ground and confirm that it goes low.  The system doesn’t wake up. I know it’s not immediately going back to sleep because right now there is no automated way for it to enter sleep m

Hello everyone,When running STM32Cube AI Studio on Ubuntu 24 with lolcal installation (no sudo rights) I am running in the following problem:When creating a new project and starting a run I am getting an Error when AI Studio tries to look into /opt/st/pluginsRun failed: Error: ENOENT: no such file or directory, scandir '/opt/st/plugins'Does AI Studio whats to look into the STM32CubeIDE plugins or for which plugins is it looking and how could I change the path where it is looking for these?Thanks in advance for your help!

I’m working on a system design that incorporates gigabit Ethernet. I’ve been looking at using the STM32N6x7 family of parts to support this functionality. The product selector and datasheet seem to indicate that each package supports the 1000 Ethernet. In addition, the datasheet starts off by listing the gigabit Ethernet as a family supported technology. However, Tables 2 - 5 of the datasheet that list the variations in supported functionality between packages does not list Ethernet whatsoever on any package. To me this implies that the functionality is supported on all devices equally, otherwise the different protocols supported would be listed here.Figure 1: Example of Product Selector FilterFigure 2: Excerpt from Datasheet Listing 1 Gbit Ethernet Support for the STM32 Family Thus, I started with the smallest package for ease of routing and space consumption. However, when matching the device with an external gigabit Ethernet PHY as required, I noticed that there are signals that are

We are currently evaluating the VL53L9CX 3D dToF sensor for our next-generation product line.Our product is mounted on a machine and subjected to continuous vibration.While reviewing available documentation, we noticed characterization data and community discussions regarding shock/vibration tolerance for older generations like the VL53L1 and VL53L5 series. However, given that the VL53L9CX uses a different optical stack, we want to ensure its structural integrity and alignment stability under heavy mechanical stress.Could someone from ST or the community share: Vibration & Shock Qualification Data: Are there published test reports or datasheet parameters for mechanical shock (g-force/duration) and random vibration (sine/PSD profile limits) for the VL53L9CX? Optical Alignment / Micro-movement Sensitivity: Has ST evaluated whether high-frequency mechanical vibration causes optical misalignment or ranging artifacts in the MOE array setup during operation? Mounting Best Practices: