Solved

Hi, the current STM32CubeIDE for Visual Studio Code 3.6.4. (and maybe before) "Create empty project" generates in CMakeLists.txt # Core MCU flags, CPU type, instruction set and FPU setup set(cpu_PARAMS # Other parameters # -mthumb # -mcpu, -mfloat, -mfloat-abi, ... )The comments are misleading, because in cmake\vscode_generated.cmake:set(cpu_PARAMS ${cpu_PARAMS} ${CPU_FLAGS})and therefore, my cpu_PARAMS will be combined with the CPU_FLAGS which already include -mcpu etc.which effectively overwrites my settings.hthKnarfB

Hi,I'm facing some issues with some STM32G474RET6s, and want to rule out counterfeit chips, even if that seems unlikely.After googling for some solutions, I confirmed the AP IDR register and the DBGMCU_IDCODE both hold a revision ID of 3, which I expected from the X code on the label. However, I noticed that the markings on the chip match the LQFP80 footprint, rather than the LQFP64 we purchased.I have read the qualifications about how device markings can differ, but it doesn't hurt to ask: is this outdated documentation, or is there a possible issue?Thanks.

Hi, When I create a new project on STM32CubeMX, it either freezes when I try to set up some peripherals, or I just get a blank screen when I try to reopen the porject after generating the code. I have tried rolling back to an older version, completely reinstalling, tried it on an ubuntu VM, switched devices, but nothing worked. kind regards, Sam

Due to more performance requirement, i wanted to change the ThreadX timebase to 1ms. To what i have researched till now i need to make the following #define TX_TIMER_TICKS_PER_SECOND to 1000 which is usually set at 100 which is 10ms. Any idea what else need to be done to make the ThreadX timebase to 1ms other than this or is this enough already?Thanks a lot for guidance.

Hi everyone,I am using a STM32H563RG and I need the RTC to work even if the VDD is powered off. To do that, I am plugging a battery on the VBAT pin to power the RTC and the Backup domain. But I tested it and it seems the RTC is stopped and the backup domain is cleared when VDD is powered off.Here is my initialisation code :/* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_GPDMA1_Init(); MX_ICACHE_Init(); MX_CRC_Init(); MX_SPI1_Init(); MX_TIM3_Init(); //MX_RTC_Init(); MX_ADC1_Init(); MX_ADC2_Init(); MX_TIM2_Init(); MX_FileX_Init(); MX_IWDG_Init(); MX_TouchGFX_Init(); /* USER CODE BEGIN 2 */ LL_PWR_EnableBkUpRegulator(); LL_PWR_EnableBkUpAccess(); if(LL_RTC_BKP_GetRegister(RTC,LL_RTC_BKP_DR0) == 0x32F2){ //Read Backup register to see if it was previously written RTC_Datas.RTC_initialized = 1; //Set flag GPIO_Set(Led_orang); //Turn Orange LED On }

I am working on an STM32 + Azure RTOS project where I need to access the same SD card in two different modes: When the microcontroller accesses the SD card directly, I use FileX with an SDIO/SPI driver. When the SD card is connected to a PC via USB, I use USB MSC (Mass Storage Class) so that the PC can read/write the card. Individually, both functions work perfectly:  FileX can read/write SD card when MCU is accessing itUSB MSC works when PC is connected However, when I try to support both modes simultaneously, the SD card fails to work correctly.There is no reference example from ST or Microsoft showing how to share the SD card between FileX and USB MSC at runtime. My main question: How can I properly share the same SD card between FileX (MCU access) and USB MSC (PC access) in Azure RTOS, ensuring that both do not access the file system at the same time? Is there an official method, mutex mechanism, media lock, or recommended design pattern for this scenario?

CubeIDE, STM32H747I-DISCOFor some reason my build keeps failing to find the adv7355.h even though the header is clearly in the project space & other headers with that path are found, see picture below. Anyone any clue why this is happening?w,

HI ST TEAM,Relevant code here:https://github.com/WHMJJ/-STM32H753-st67w61-Project-Middleware Integration ConflictI am integrating the ST67W61 Command Line Interface (CLI) Middleware into an STM32H753 project generated by STM32CubeMX. This integration is currently blocked by two critical linking errors stemming from version mismatch and incomplete project generation.1. FreeRTOS Version Mismatch (Mandatory V10.6.0 API Missing)The ST67W61 CLI examples explicitly require FreeRTOS V10.6.0 for essential API functionality.My Environment: STM32CubeMX (using STM32CubeH7 FW Package) provides FreeRTOS V10.3.1.Error Symptom: The linker fails with an undefined reference for the V10.4.0+ indexed task notification functions, which are vital for communication within the CLI module:undefined reference to 'xTaskNotifyGiveIndexed'undefined reference to 'ulTaskNotifyTakeIndexed'Impact: Since the V10.3.1 kernel lacks the implementation of these functions, I cannot proceed with the CLI module's initializati

I am trying to update a text area called textTestArea with a string and I want to be able to format the string with a newline character.    Ex "I went to the store \n to buy food" I created a texts called genericText that uses a default font that has wildcard range 0x00-0xFF ,  I also tried having range 0x20-0x7e and wildcard character 0x0A (/n)here is the text and typography:  Here is the screen with text area:in baseview.cpp it creates:  textTestArea.setPosition(397, 26, 237, 55); textTestArea.setColor(touchgfx::Color::getColorFromRGB(0, 0, 0)); textTestArea.setLinespacing(0); Unicode::snprintf(textTestAreaBuffer, TEXTTESTAREA_SIZE, "%s", touchgfx::TypedText(T_GENERICTEXT).getText()); textTestArea.setWildcard(textTestAreaBuffer); textTestArea.setTypedText(touchgfx::TypedText(T___SINGLEUSE_E1ZC)); add(textTestArea);So now in my view.cpp: static const uint16_t TEXTBUFFER_SIZE = 64; Unicode::UnicodeChar textBuffer[TEXTBUFFER_SIZE]; U

I want to train some small DL models with Nvidia's RTX 50 series GPU, which can work properly only with CUDA 12.x. I've learned that the CUDA 12.x is only compatible with ONNX Runtime 1.17.x or newer version. So I want to know if the X-CUBE-AI 10.2.0 support ONNX Runtime 1.17.x or newer version? If it can, I would like use the X-CUBE-AI 10.2.0 to deploy my DL models on the STM32 MCUs.

Hello everyone,I am currently migrating a project from a Newhaven ATXL series display to their newer ASXP series (both 4.3", 480x272 RGB interface) on a custom board based on the STM32F767.I am trying to isolate the root cause of severe color artifacts I'm seeing, specifically whether this is a Software configuration issue, a signal integrity issue on my Custom PCB, or a potential hardware defect in the display panels I received.The Situation: I have configured the LTDC timings strictly according to the new ASXP datasheet. However, the image is unstable and has artifacts.The "Hot-Swap" Verification: To troubleshoot, I performed a live test to rule out my PCB connections:I initialized the STM32F767 with the new ASXP LTDC settings.Connected the new ASXP screen -> Result: Artifacts/Noise.While powered on, I swapped it with the old ATXL screen.Result: The old ATXL screen works perfectly even when driven with the new ASXP timings.Video of the test:My Question: Since the old screen works

Hi,I'm trying to work with the STM32N6. I have a NUCLEO-N657X0-Q board.When I use an external debugger via CN1 everything is fine, however I am experiencing a lot of trouble with the ST-Link.It seems like there is a small (0.01%) chance that attempting to access memory will cause the device to lock up.An example of the sort of command that gets sent to the ST-Link is: `[0xf2, 0x07, 0xfc, 0xff, 0x00, 0x34, 0xcc, 0x35, 0x01]`. That is, a simple command to the ST-Link to read or write memory.I am doing this as part of an attempt to implement support for the STM32N6 for probe-rs, however the problem seems to occur even when using ST tools. For example, the following has a good chance of locking up:./STM32_Programmer_CLI \ -c port=swd \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 \ -r32 0x34000000 32768 Once the ST-Link has locked u

I am attempting to reconfigure Pin 8 (datasheet default assignments are PB6/PA14-BOOT0/PC15-OSCX_OUT) from PA14-BOOT0 to PB6 GPIO Output Open Drain (GPIO_MODE_OUTPUT_OD) a short time after start-up.My current attempt (code below) does not accomplish this (instead, once the port pin reconfiguration code below has run, an attached STLINK device can still connect to the MCU, or if already connected to MCU, continues to function.)IMPORTANT: I have not yet and do not plan to change MCU option bytes (using STM32Programmer).Intention: In the application (under development, written in C using STM32CubeIDE, using HAL), at power-up, a connected STLINK device should function normally. A short time later (under condition set in firmware), the application firmware is expected to reconfigure Pin 8 from power-on default (as Port A, GPIO bit 14, Alternate Function 0, which is STLINK SWCLK) to a different configuration (as Port B, GPIO bit 6, Open Drain output).This change should (ideally) be able to o

Hello,I am trying to generate a STM32CubeIDE project using CubeMX (version 6.16.1) for MP157D-DK1 board. It generates some device trees (linux, u-boot, tp-a) but it fails to generate the CubeIDE project.I also tried older versions of CubeMX (as late as 6.12) and none work.The error it displays is attached. Any idea what might be going wrong with the code/project generation? I have STM32CubeIDE v2.0.0 installed.Thanks.

Hi everyone,I’m working with an STM32L5 USART and trying to clarify a point about parity vs. MSB-first transmission.From the reference manual (USART parity control / frame formats), when parity is enabled the frame formats are shown as:M=00, PCE=1: SB | 7-bit data | PB | STBM=01, PCE=1: SB | 8-bit data PB | STBand there is a note that “in the data register, the PB is always taking the MSB position (8th or 7th depending on M)”.This wording caused confusion in our class:one interpretation is that because parity occupies the MSB position in the data register/word length, it might be transmitted before the data bits when MSBFIRST=1.My understanding is:MSBFIRST only reverses the order of the data bits inside the data field.The parity bit remains the parity field in the frame, i.e. logically after the data field and before stop bits.The “MSB position” note refers to the bit slot within the word length/data register, not to the time order on the line.Could someone confirm:Question:When MSBFIR

Heya!I've been borrowing an STLINKV3MINIE and today my own (legitimate) STLINK/V2 arrived today, but I haven't been able to detect it. I purchased the product from Mouser (https://au.mouser.com/ProductDetail/STMicroelectronics/ST-LINK-V2?qs=H4BOwPtf9MC1sDQ8j3cy4w%3D%3D&srsltid=AfmBOooS1jAwuhdu3ZF7xo5hJ7OWAqrWYGnkUSL7hzKZPl6fvURN-Hnq).You can see in device manager, when I have the V3MINIE connected, it shows in the DM panel:When I connect with the V2, my computer does recognise it:I have been using the same USB port on my computer, and I am using the cable that arrived with the V2 to connect it. The red LED on the V2 is on (remains red, no flashing), but I'm getting nothing.When I try connecting to it via STM32CubeProgrammer with the V2, I get nothing (Verb level 3):It does not detect the Serial Number and doesn't show up as something to connect to in the cfg panel:It works A-OK with the V3 as soon as I plug that back in (same settings), but not with my V2.I had downloaded the V2 dr

Case Description:Title: LSM6DSL FIFO data misalignment (XYZ rotated) and FIFO_PATTERN always 0 — how to align reads?Body:I’m using an LSM6DSL over I²C with an STM32. Goal: batch accelerometer-only samples into FIFO and drain clean (x,y,z) triplets at a fixed watermark. I keep running into two issues:Data misalignment — the XYZ triplets appear “rotated”. I’ll get a few normal lines, then a line where one column looks like a big random number (e.g., ~168xx), then it stabilizes again. Example:x,y,z 5, 250, 16870, 17, 258, 16825, -66, 221, 16828, -53, 284, 16834, Sampling End Sampling Start -22, 4, 242, 16846, 13, 281 16830, 51, 230 16882, 39, 242 16850, 11, 258 16803, -14, 220 16843, -24, 232 16855, 0, 241FIFO_PATTERN is always 0 — I expected to use FIFO_STATUS3/4 (FIFO_PATTERN[9:0]) to know which axis comes next and align before parsing, but I always read 0, even when the FIFO is clearly non-empty and STOP_ON_FTH has fired.Hardw

hi,     we use one LSM6DSL sensor to read 3 axis acc FIFO data each second, but after some times, the FIFO out data become misaligned. the sensor setting is below:XL_ODR_26HZGyro disabled.FIFO ODR = 26HzFIFO threshold (water mark) = 128No decimationBDU Block Update enabledFIFO Is in continuous modewe have a timer to trigger to read FIFO data by Zephyr I2C(frequency: 100000bits/s) each second, before data reading, we check the numbers of FIFO by checking FIFO_STATUS1 and FIFO_STATUS2 register, then we read a multiple of 3 axis sets each time, for example if the FIFO data number has 78, we will read all FIFO data one time, if the number is 76 or 77, we only read 75 data one time. it can make sure reading data is complete 3-axis data. firstly, the reading data is the right like as (X_ACC, Y_ACC, Z_ACC). but after some time (the time is not fixed) the data will become (Y_ACC, Z_ACC, X_ACC). we don't know how to fix this issue. please help us.

Hello,I am using STM32H750VBT6 to perform microSD card write operations. After a number of writes, the CPU sometimes resets during a write operation. At the same time, the Vcore (1.13V) rail shows a voltage drop. The issue is random, but the higher the write frequency, the faster it occurs. Below are details of my hardware, software, and test results. 1. Hardware designThe power supply module:The power supply is designed with 12V input, generating 3.8V, 3.3V, 1.8V, and 1.13V.3.3V powers the STM32 VDD pins, and 1.13V powers the VCAP pins.Each VCAP pin is decoupled with a 0.1 µF capacitor in parallel with a 4.7 µF capacitor (located close, but not on the same plane due to vias).The SD card interface: 2. Software designInitialization code generated by STM32CubeMX + HAL library: void MX_SDMMC1_SD_Init(void) { hsd1.Instance = SDMMC1; hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; hsd1.Init.BusWide = SDMMC_BUS_WIDE

Attempting to download the new STM32CubeMX 2.0 (required since not included in STM32CubeIDE anymore) does not work from your site.https://www.st.com/content/st_com/en/stm32cubemx.html# has links all over the page to "Download STM32CubeMX"...Unfortunately all these links have the same problem: a License Agreement comes up, but when I click Accept nothing happens.There's not an obvious way to download in any other way.

Hello,I'm using STM32 for a long time and really enjoy these devices to work with them.But I'm a passionate about aviation and I want to build my own A319/A320/A321/A330 PFD/ND displays.My idea is to use USB or Ethernet to send compressed image from X-Plane 12 to a STM32 MCU.What I'm trying to achieve is to use a small number of devices to show the PFD image on 2 square displays of 800x800 MIPI 4 lanes.I found some IC which can convert LTDC RGB888/RGB666/RGB565 to MIPI 4 lanes (like TC358778XBG).My questions are:1. There are any MCUs with dual phisical LTDC avaiable from STM? In case there is no MCU available, I will use one per display.2. FMC can be used with SDRAM + LCD in the same time? Because I saw the physical lines are shared. Thanks.

Hello ST Community,I’m currently testing an SGTL5000 audio codec with the STM32WB55 Nucleo board, and I’ve run into an issue where audio only works when analog test mode is enabled. I’m using the Hathor SGTL5000 audio breakout board from PCBWay (project link).System ConfigurationSTM32WB55 Nucleo-BoardSTM32CubeIDE Version: 1.18.1STM32CubeMX Version: 6.14.1SGTL5000 Board: Hathor Breakout (PCBWay project)Connections to SGTL5000:VDDIO, VDDA, VDDD = 1.8V (external LDO)I²C only, pulled up with 4.7 kΩMCLK = 12 MHz from STM32WB55 via SAINo SCLK, LRCLK, or I²S DIN/DOUT connectedMic connected to MIC_L; HP_L/R used for headphone outputGoalTo establish an internal audio path on the SGTL5000:MIC → ADC → DAP (optional) → DAC → Headphoneswithout using I²S (just internal routing).ProblemSGTL5000 only outputs audio when analog test mode is enabled CHIP_ANA_TEST1.TESTMODE = 1; CHIP_ANA_TEST1.TM_SELECT_MIC = 1; CHIP_ANA_TEST1.TM_ADCIN_TOHP = 1; CHIP_ANA_TEST1.HP_HOLD_GND = 0; CHIP_ANA_TEST1.HP_HOLD_G

Recently brought 2 pcs STLINk V3 MODS. downloading all the documents from st site i didnot find right information(whre is SWD,SCLK, pin located in STLINK V3 MODS) so that i can connect to my target bare metal board of STM32F103 Series MCU. Very much time wastage buy doing fake stlink v2 , from authentic source i brought STLINK V3 mods in a hope that i can programe and debug. Help required.No fruitfull video, no fruitfull document available throughout of internet. 

Hello,I am using the STM32H747IIT6 microcontroller along with the LAN8742A Ethernet PHY, configured in RMII mode. However, I am facing issues where the Ethernet interface is not working at all in my circuit. It appears there may be multiple bugs or configuration issues affecting the RMII driver.I suspect there are underlying bugs in the RMII driver implementation. I would appreciate any advice or suggestions on how to resolve these issues and get the Ethernet interface up and running as soon as possible.

Hi,Our development board uses BQ25120A for battery management.In the datasheet section 10.2.2.1 Default Settings, there is a statement:• If the function is not needed, connect TS to the center tab of the resistor divider between VIN and the ground.(pull up resistor = 14 kΩ, pull down resistor = 14.3 kΩ)We didn't need the TS function at this time, so we followed that advice. However, upon assembly, the charging did not work. We figured out it was because of a TS fault. Checking the datasheet again, section 9.3.16 External NTC Monitoring (TS) says: "To disable the TS function, pull TS above TSOFF threshold." Then checking the TSOFF threshold, it's minimum value is 55% of VIN, and the 14k/14.3k divider only gives around 50%. I believe these values are applicable for the case when TS function is used with a 10k NTC (b=3370), contrary to what 10.2.2.1 says. And if the function is not needed, the pull up resistor should be 10k or less. So it is either misleading, or there is a mist