Solved

Hello,I'm trying to get multi-buffer DMA on ADC working. I modified `HAL_ADC_Start_DMA` function to use `HAL_DMAEx_MultiBufferStart_IT`instead of `HAL_DMA_Start_IT.But for some reason, M0 Completion Callback is executed multiple times before switching to M1 buffer.uint32_t bit = READ_BIT(((DMA_Stream_TypeDef *)hadc1.DMA_Handle->Instance)->CR, DMA_SxCR_CT); printf("BIT: %s\r\n", bit ? "1" : "0");I have this in IRQ handler (on M0 or M1 conversion complete callback), and for some reason, flow is following:BIT: 1BIT: 1BIT: 1BIT: 0BIT: 0BIT: 1BIT: 1BIT: 1BIT: 0BIT: 0BIT: 1BIT: 1BIT: 0As you can see, it doesn't switch CT like it should (M0 M1 M0 M1 M0 etc...) but the buffer is used multiple times before it's switched. Any ideas where can be an issue?Thanks.

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Hi everyone, I've written this little python script to control the brightness in several LED1642GW drivers connected in daisy chain. According to their Application Note, at page 4, it says you have to send 16 words of 16 bits where the first 15 must have a "Brightness data latch" while the last one must have a "Brightness global latch". My question actually is what those 16 words mean? Does they mean the brightness level? According again to the Application Note... at page 10 the default value of CFG-15 is "0", which means that "16-bit brightness register (65536 grayscale brightness steps)" is selected. So ... I think I should see some brightness variation when I send some different value than 0xFFFF (65535).The point is that I see always the same brightness level regardless of the value I send. Nevertheless, I have to set the brightness because otherwise LEDs will not turn on when I send the write switch.What do you think? Am I misunderstanding the protocol to set up the brightness? Th

Rev. 5 of those RMs introduced dual-bank devices. According to "3.3.1 FLASH memory organization" the page numbers in bank 2 start at 256, which seems to be very odd as the PNB field in FLASH_CR has 10 bits, so one would expect 1024 instead.

I use STM32CubeIDE under MacOS. I don't understand whether it is a bug or not. I can not change Input frequency of HSE in clock configuration. I can do it in CubeMX under Window on the same project.

There is no file named DTM_UART.hex  in the installed folder of STSW-BLUENRG-DK.I reinstalled 2 times. please guide and there is no proper mention of the connections required in AEK-COM-BLEV1.pdf.

Unresolved inclusion: <string.h>where is the file exactly?

Hi,I've got the latest SPC5Studio 6 with all updates (gcc4.9.4) and testing on the SPC560D40L1 chip with the discovery board. So core is e200z0h VLE.I want to manipulate the flash in my app so I need to call some code from the RAM. I added the necessary sections in the application.ld, and the necessary attribute for my method :__attribute__ ((section (".codeinram"))) void method_in_ram()I'm calling this method from flash codevoid flash_method() { method_in_ram()}All this compile correctly (no warning, no error), but this crashes during debug with invalid opcode...I decompiled the hex, found that the flash_method content is not VLE code but PPC code !! e200z0h does not support PPC but only PPC VLE. Why is gcc creating PPC opcodes to call a method in RAM ? I tried to add longcall attribute but it does not help ...Any help appreciated!Thanks

Hi,In the sample application for SPC584BXXX flash test, the hex file is written on RAM and then executed. I need the hex file to get written on flash and then write some data on other specific sectors of flash. So I modified the linker script by changing the RAM sections by flash at some places but the program doesn't work as expected. Please help me to get an appropriate solution so that the hex gets written on flash and the FlashWrite Flashinit, FlashErase etc. will work as expected.Thanks in advance.

STM32CubeMX doesn't show MII as an option for Ethernet on the STM32H730VBTx. Is MII not available on this part (RMII only?) or is there a problem with STM32CubeMX? The datasheet suggests it should support MII.

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Hi Everyone,    As you know we are working on the Custom BLDC Driver Board with SPC platform in that we are facing the Some issue in the FOC integration.Current environment and setup:1. FOC Source code (SPC_MCTK_LIB) for SPC560p DISP Board2. FOC source code for X-Nucleo IHM001 Board.3. SPC560p Discovery Board4. X-Nucleo IHM001 Board with Bull running Motor.We are trying to replace the L9907 driver Board from the SPC_MCTK_01 kit with L6230 driver Board of X-Nucleo IHM001 Board.Queries1. Current FOC code Part of SPC_MCTK_01 has the L9907 driver code, We are trying to replace the l9907 driver code with L6230 driver code to suite our custom BLDC motor drive. Please guide us which and what part of the software has to be changed in order to make this integration correct.

I cannot find the external requirement for wakeup pins PA0, PC13 and PB3 on STM32WL55.Do they need a pullup (e.g. 10K) to keep the output state once the MCU goes into one of the sleep modes?Thanks

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Hello,I am using STM32F469 with an external SDRAM (Alliance AS4C16M16MSA-6BIN) through FMC bus. Both STM32F469 and AS4C16M16MSA-6BIN run at 1.8V. The FMC bus is configured with 13 address pins and 16 data pins as follows: hsdram1.Instance = FMC_SDRAM_DEVICE;       /* hsdram1.Init */       hsdram1.Init.SDBank = FMC_SDRAM_BANK1;   hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9;   hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13;   hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;   hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;   hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;   hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;   hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;   hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;   hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;       /* Timing configuration for

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I don't use CubeMX - I write to all the SPI registers directly.STM32F030C8I have SPI1->CR2->DS set as 7 (8 bit data transmit) but the CPU is transmitting 16 bits for each write to the SPI1->DR register.I verify this using a logic analyzer.I can't find any other register setting that affects the number of transmit bits so I'm very puzzled as to this behavior.Any insights to get only 8 bits transmitted?Thanks

Serial port interrupts are firing continuously, so that the application code does not run.I'm using an STM32H743, on the Nucleo board.Initially, USART3 worked properly for a few weeks, then failed in this manner. I then moved to USART1, which worked for a few weeks, then also failed like this. The testing was done with RX grounded and TX left unconnected. The same results are obtained if RX is left floating.The following flags are observed as set on each interrupt:BUSY, CM, CTS, EOB, IBD, NE, ORE, REACK, RTO, RXFF, SBK, TXFT, WKUP.I am only looking for RXNE, TC, and TXE. (For receiving bytes and sending bytes.)What can I do to stop USART1_IRQHandler() being called continuously?P.S. I configure the port with the (mostly) generated:static void MX_USART1_UART_Init(void) {   /* USER CODE BEGIN USART1_Init 0 */   /* USER CODE END USART1_Init 0 */   LL_USART_InitTypeDef USART_InitStruct = {0};   LL_GPIO_InitTypeDef GPIO_InitStruct = {0};   /* Peripheral clock en

STM32CubeIDEVersion: 1.5.0Build: 8698_20201117_1050 (UTC)Project for STM32G071 (Nucleo), Bit names in SFRs wiev for DMA->ISR has wrong numbering.  

1. TCP IP dual stack (Ipv4 / Ipv6)2 TLS1.2

I have configured MDI and MDIO pins and wanted to verify mdio write cycle signal on DSO. So what other settings need to do apart from MDC and MDIO pin configuration. Do I need to initialize MDC clock? What are the settings need to do for MDC clock.Below is mdio_write function I am using.static void mdio_write(volatile struct ETHERNET_tag *reg,uint8_t phy_addr, uint8_t reg_addr,uint16_t data){ reg->MAC_MDIO_DATA.B.RA = reg_addr; reg->MAC_MDIO_DATA.B.GD = data; reg->MAC_MDIO_ADDRESS.B.PA = phy_addr; reg->MAC_MDIO_ADDRESS.B.RDA = reg_addr; reg->MAC_MDIO_ADDRESS.B.GOC = GMII_WRITE_OP; reg->MAC_MDIO_ADDRESS.B.GB = 1; dwmac_qos_mdio_busy_wait(reg);}

Hello , Im currently exploring Touch gfx capabilities on low cost hardware (STM32G071  + SPI LCD shield) , and i comme across a bug .steps to reproduce :Start a fresh new project on Touch GFX using online demo , choose STM32G071 demoLoad a few additional image to project (a series of 40 png issued from a splitted .gif file total size : 150kbConnect board generate code and flash target Results : some images of GUI gets missed up ( black lines ) like : navigation arrow , touch gfx logo and some texts disappear .I suppose this is due to low ram available , can you please explain ow touchgfx is allocating cache for bitmaps in demo project? since the board has a NOR non mapped flash chip for assets storage does it mean that all assets are being cached on startup ? if yes why touchgfx still call for SPI data reader each time i switch screen ?Sorry for long post but i'm quit confused : / , many thanks in advance Ps : please find attached te additional images i'm usingPs2: The additional

Hello,I can't found the electric schematic (pdf is fine) of the STM32F429I-DISC1 evaluation board.Can someone help please.Thanks.

I am designing an application where the STUSB4500 must be able to negotiate successfully with a wide variety of USB-C PD sources. This involves a microcontroller which edits the PDOs of the STUSB4500 on the fly after reading the source capabilities. ST's example software recommends sending a software reset message to the STUSB4500 since the source will retransmit its capabilities during the re-negotiation that ensues, but this software reset triggers a hard reset with some USB-C PD sources, and so I'd prefer a solution that doesn't involve a software reset at all.The USB-C PD specification defines a command GET_SOURCE_CAP, which can be sent in the same manner as the SOFT_RESET message except that the transmit buffer is written with 0x07 rather than 0x0D. However, this triggers a hard reset in all USB-C PD sources I've tested with, even those that handled the software reset just fine in ST's recommended method. Is there a reason why the STUSB4500 hard resets when this message is sent, a

I'm somewhat new to scatter files and I'm trying to understand them better by doing some tests on a ST32F765 project (with 2mb flash at 0x0800 0000 - 0x081F FFFF).This scatter file works OK:LR_IROM2 0x08100000 0x00100000 { ; load region size_region (Sector 8 - Sector 11, single bank) ER_IROM2 0x08100000 0x00100000 { ; load address = execution address AppFileInfo.o (+RO) ; } }   LR_IROM1 0x08000000 0x00100000 { ; load region size_region (Sector 0 - Sector 7, single bank) ER_IROM1 0x08000000 0x00100000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) .ANY (+XO) } RW_IRAM2 0x20000000 0x00020000 { ; RW data .ANY (+RW +ZI) } }but this scatter file does not work:LR_IROM2 0x08000000 0x00100000 { ; load region size_region (Sector 0 - Sector 7, single bank) ER_IROM2 0x08000000 0x00100000 { ; load address = execution address AppFileInfo.o (+RO) ; } }   LR_IROM1 0x08100000 0x00100000 { ; load region size_region (Sector 8 - Sector 11,