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Hi all, I have a small issue with the STM32N6570-DK board and the VENC_SDCard example code. The PN12 pin has a voltage of 0V (card inserted) or 1.80V (no card inserted); on the MCU side, the GPION data register (IDR) always shows a logic 0 in both situations. The VENC_SDCard / VENC_SDCard_ThreadX example code basically jumps over SD Card detection as it assumes a logic level of 0 == card present. If there is no card, mounting fails and aborts further processing. I have the requirement to react to card inserts / removals, so I'd like to trigger an interrupt or at least be able to read a logic high once in a while but could not find out what exactly is missing in the code. * I tested with an empty CubeMX project and set this PN12 to input; here I do see logic level changes.   * I susptected the VDDIO voltage domains to be at 3V3 for that block and manually switched VDDIO_SD to be at 1V8, but that did not show a change as well * I did not fiddle with security bit settings... may

We are currently evaluating the following STMicroelectronics IC for our application:SPV1040TTRAs part of our reliability and performance assessment, we kindly request your support in providing:Temperature vs. efficiency curves across the specified operating temperature rangeMTBF (Mean Time Between Failures) data or estimated MTBF hours for the above-mentioned ICs

Hello,In my project, I want to hold boot params in BKPSRAM so "Application project" can also write and read this section easily. If boot is needed, "Application project" will set boot params as required and after that it will use "NVIC_System_Reset".Therefore, I tried to write and read some parameters in this area. I can see the datas is written successfully in "BKPSRAM_BASE_S" section while debugging but when I restart the debug session, BKPSRAM section is all fill with zeros. I know that I am missing something but did not find it. - STM32N655 custom board. #define BKP_SRAM_START_ADDRESS ((uint32_t)BKPSRAM_BASE_S) #define BOOT_PARAMS_PTR ((BootParameters_t*)BKP_SRAM_START_ADDRESS) /* USER CODE BEGIN Init */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_RAMCFG_CLK_ENABLE(); __HAL_RCC_BKPSRAM_MEM_CLK_ENABLE(); HAL_PWR_EnableBkUpAccess(); HAL_PWREx_EnableBkupRAMRetention(); /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* Configure the per

I entered the lengths of the DDR traces from the ST official evaluation board into Excel, and the maximum length deviation is 3 mm. Is the trace routing on the evaluation board reasonable, and can I reuse it directly on my own board?   

Hello ST Community,My name is Gorakhnath. I am currently pursuing M.Tech (Power Electronics and Drives) at NIT Kurukshetra. I am using the STM32F4DISCOVERY (STM32F407VGT) board and I need stable DAC outputs for my hardware application.What I need (requirement)When the DAC command is 0 V, I need the output to be as close as possible to true 0.0000 V, because my external circuit maps:0 V → 0 A3 V → 50 AEven a small voltage like 0.045–0.05 V produces unwanted current (~0.5 A) in my system.Issue / ObservationOn both DAC pins:PA4 (DAC_OUT1)PA5 (DAC_OUT2)I measure about:~0.05 V (sometimes ~0.045 V) when the command is 0 VThis happens even when I am not sending any command from LabVIEW, or when I send 0,0.What I tried (software checks)Set DAC values to 0 using HAL on both channels:HAL_DAC_SetValue(..., 0) for DAC channel 1 and channel 2Forced PA4/PA5 to GPIO output LOW when command is 0 V:Configured PA4/PA5 as GPIO_MODE_OUTPUT_PP and wrote&nbs

I am trying to develop a GUI application with the STM32H7S78-DK.  I want to send uart data from the board over wires to a raspberry pi.  To simplify the process without graphics I'm just trying to send a simple "Hello" string over UART7.  From what I can see from the data sheet, UART7 is connected to pins PE7 and PE8, which correspond to D0 and D1 on CN14 on the arduino headers by default.  Please correct me if I am wrong.  So I first am just initializing those pins with uart on STM32CubeMX then I was just sending a simple HAL_UART_Transmit() with a 2 second HAL_Delay().  However, I see no data coming through when putting a logic analyzer on those pins. What am I doing wrong?  Here is the very simple basic uart code in main.  /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************

Dear Support Team,I am planning to implement a circuit based on the TDA7293V. In this design, the IC will remain powered on, so I intend to use the circuit shown in Figure 6 (Single signal standby/mute control circuit) to prevent 'pop' noise. Given that my supply rails are ±44V (+Vs = +44V and -Vs = -44V), what is the recommended voltage range for the MUTE/ST-BY signal to ensure reliable operation?Thanks in advance!! With warm regards, Daniel.  

HI,I am working on a board using STM32H573V and have a working solution with UCPD detecting an inserted memory stick and running the MSC class. In an other part of the software I am using PC9 as an GPIO push-pull, low speed output and as soon as I set it to high, the voltage at PB14 (UCPD CC2) drops from 3.3V to 1.5V and my UCPD handler signals a device attached and turns VBUS on even though nothing is attached. There is no other electrical connection between PC9 and PB14 on the board. I am using a TCPP03-M20 for VBUS switching. The board is acting as VBUS source.

Hello all,I've designed a board around a STM32H743 (LQFP-100) and am running into the following issue.On 2 boards out of 10, the HSE seems not to start properly. The HSE_RDY flag is never set after enabling HSE. I have checked it's not in bypass mode. On the other boards, it works perfectly.The crystal is a ABM3B-8.000MHZ-10-1-U-T and the load caps are 10 pF. We checked possible soldering issues, tested different load cap values just to see, and even replaced the crystal on the failing boards - to no avail.Looking at the OSC_IN/OSC_OUT signals (PH0/PH1) on a scope does not show a significant difference between the working and non-working boards. Maybe just a very slight difference in p-p amplitude.I have looked at the AN2867 app note, and the gain margin seems sufficient according to the formulas given there. I have heard that this crystal may have a bit too high ESR (200 ohm) for the STM32H7 HSE, but again, the gain margin seems alright.Any idea? I have tested with a minimal

I am running into issues building for the eMMC storage target for the `stm32mp25-disco` MACHINE type.I thought that adding "emmc" to `BOOTDEVICE_LABELS` should be enough to trigger building emmc flashlayout files. Is that not the case? I haven't found clear documentation on the subject.I tried making modifications to both `local.conf` and the machine conf directly. I was able to confirm the change takes affect with `bitbake -e`. Each time I build an image it only builds the flashlayout files for `sdcard`. What am I missing?mkdir yocto cd yocto repo init -u https://github.com/STMicroelectronics/oe-manifest -b refs/tags/openstlinux-6.6-yocto-scarthgap-mpu-v25.08.27 repo sync DISTRO=openstlinux-weston MACHINE=stm32mp25-disco source layers/meta-st/scripts/envsetup.sh printf "%s\n" 'BOOTDEVICE_LABELS = "emmc"' >>conf/local.conf bitbake core-image-minimal ls -l tmp-glibc/deploy/images/stm32mp25-disco/flashlayout_core-image-minimal/optee/ FlashLayout_sdcard_stm32mp257f-dk-ca35tdcid-os

Or 'Feature Request' or similar.Applies to CubeIDE, CubeMX, and CubeMX2 - probably also others ...eg, see here and here.

I'm trying to figure out how to make a driver for your camera. The problem seems to be the licensing. The driver is all GPL which would be fine because with the datasheet i could figure out all the calls i need to make my driver work on a non linux device. The problem is the patches. The only place i can find about the patches are on the github driver page. Are they located another place thats not under GPL.* https://github.com/STMicroelectronics/vd56g3-linux-driver

Hello.I'm working on project with LSM6DSO and I use FSM.For easier programming I use the FSM Feature in MEMS studio, but it looks like it's buggy:1 - SRP doesn't change the graphical diagram of FSM. It always point to start of the program on RNC.Example: 2 - Adding STIMER3/4 lead to error when I try to export the register config (save device configuration as):There are also missing settings from the Fixed Data section (CONFIG_A, CONFIG_B, SETTINGS) which could be important.Thanks

I've always found it a little irritating:#define CLK_A_Pin GPIO_PIN_0 #define CLK_A_GPIO_Port GPIOFWhy is it deemed necessary to have "GPIO" in one, but not the other? Surely, that should be either:#define CLK_A_GPIO_Pin GPIO_PIN_0 #define CLK_A_GPIO_Port GPIOF("GPIO" in both), Or:#define CLK_A_Pin GPIO_PIN_0 #define CLK_A_Port GPIOF ("GPIO" in neither) (There isn't a label for "suggestion" - so "bug report" is the nearest option)

Evaluating the L9963E BCC chip for a BMS design, using the AEK_POW_BMSNOTX eval board together with AEK-MCU-C4MLIT1 (spc58ec) running the example BMS application as reference but seeing some odd results in the cell voltage readings.All readings are a bit low compared to actual cell voltage, but cell1 and cell14 are off by a fairly large amount.What could be causing this?cell1 & cell14 reading off by 0.5vcell2 to cell13 reading off by about 0.1vCell1 reading seems to improve if the HotPlug selection jumper is mounted. But not cell14.

I am implementing NFC wake-up functionality using the main controller chip STM32L433 and the ST25DV04KC. I2C writes and reads are functioning normally. However, when the NFC field is present, the GPO pin does not output a pulse (reading the GPO register returns a value of 0x11). Using a multimeter to measure the GPO level change when the NFC field appears shows a minimal change in voltage level. The same program works correctly on an STM32F1 development board with an ST25DV04KC NFC module (both 8-pin and 12-pin versions were tested, with the same phenomenon). Does anyone know why this is happening？Could you provide some troubleshooting directions？This would be very helpful to me.Thank you！

I'm new to using AI. I want to create a USB adapter that will connect to devices with a USB port and manage and control them.How would I go about accomplishing this?Are there any pre-defined models I could use?

I am running the  FLASH_EraseProgram example code provided by STM32CubeU3.  the code fails in erasing the flash and enters ErrorHandler. I have verified the FLASH_USER_START_ADDR & FLASH_USER_END_ADDR.  it is set as follows. #define FLASH_USER_START_ADDR ADDR_FLASH_PAGE_128 /* Start @ of user Flash area */#define FLASH_USER_END_ADDR (ADDR_FLASH_PAGE_255 + FLASH_PAGE_SIZE - 1) /* End @ of user Flash area */I have tested in both debug and run mode, it is not working as expected. Is anything to be modified to run the code. regards,Rajath 

I am experiencing a problem with RTOS Proxy in STM32CubeIDE 2.0.0/2.1.0 when debugging a ThreadX application on STM32H753 using a SEGGER J-Link.The same setup works correctly with STM32CubeIDE 1.19.0, but after upgrading to 2.0.0/2.1.0 the debugger aborts during the flash download when RTOS Proxy is enabled. If I use J-Link Kernel Awareness instead RTOS Proxy everything works fine.ConfigurationMCU: STM32H753BIRTOS: ThreadXSTM32CubeIDE: 2.0.0RTOS Proxy: ThreadX / Cortex-M7Debug probe: SEGGER J-Link Ultra+J-Link GDB Server: V8.80Interface: SWDDebug configuration:RTOS Awareness: EnabledRTOS Kernel Awareness: RTOS ProxyRTOS: ThreadX (Cortex-M7)ProblemWhen starting a debug session, the debugger stops at the point where the firmware should be downloaded.The following error appears:Remote communication error. Target disconnected: Not a directory.Failed to execute MI command:load <path>/app_1500_xg.elfwhere <path> is the correct and full absolute path to my elf file.After the

Split from USART in Proteus not displaying any characters as this is now a new situation (real hardware; not simulation) Now as per your advise i have moved from simulation to real hardware can you please why under freertos its not working the led is counitnusly onn instead of blinking? Working behavior: LED blinks correctly without FreeRTOS using a simple while loop in the same setup . Flashing and debugging via ST-LINK works without issues. Problem: When FreeRTOS is enabled, the LED stays continuously ON instead of blinking under the same hood . CubeMX configuration: FreeRTOS enabled (CMSIS V2) Default task created USE_NEWLIB_REENTRANT enabled in FreeRTOS advanced settings SYS timebase tested with: SysTick TIM1 GPIO PC13 configured as: Output ( that is fine as it worked without freertos but stays counitnuoly on with freertos ) Code behavior: Using osDelay() inside the task Same toggle logic works outside FreeRTOS but not inside

I am trying to use USART in Proteus, but it is not displaying any characters in the virtual terminal. In fact, nothing is appearing at all. My workflow was: I first generated the .ioc configuration using STM32CubeMX. Then I generated the project and built it in STM32CubeIDE to create the .hex file. I loaded this .hex file into the STM32 in Proteus. For USART communication: I am using USART2. PA2 → TX PA3 → RX I also verified the following: The baud rate is the same in both: STM32CubeIDE code Proteus Virtual Terminal I even simplified the code to just print a simple string using UART, but nothing appears in the Proteus virtual terminal. I followed several tutorials, but I still cannot determine what I might be doing wrong. At the moment, the UART in Proteus is not displaying any characters at all. I would appreciate help identifying what might be causing the USART not to work in Proteus. In this project, I am implementing a Publisher–Subscriber model. However, before pro

Should each vdd pin of the stm32f407zgt6 read continuity like the blue pill on multimeter, are they internally connected within the chip or separated? Similary for all the vss pins are they also all connected vss inside stm32f407zgt6 Thanks

Hello everyone, I am Li Weiwei (李炜炜) from  a company based in Shenzhen, China, specializing in integrated circuit testing equipment and related R&D. We are currently working on a small-scale R&D / prototyping project that requires the STM32F103TBU6 (VFQFPN36 package) in bare die or wafer form (Known Good Die / KGD preferred), rather than packaged chips. Has anyone here successfully sourced STM32F103 series (or similar STM32F1xx) as bare die / wafer through ST directly, authorized distributors (e.g., Avnet, WT Microelectronics, WPG Holdings, Excelpoint, etc.), or other specialized bare die suppliers? Key details I'm looking for: Is the bare die / wafer option officially available for STM32F103TBU6? (I couldn't find it listed on the ST eStore, public datasheets, or standard channels.) Typical MOQ (minimum order quantity) — e.g., full wafer, partial wafer, or small engineering samples (our target: equivalent to 1–5 wafers or a small number of dies for initial prototyping)? R

I have question on STM32WBA65RI uC we are using it for our products TEK923/926. It seem to me that BLE stack doesn’t allow to use Free Running Binary mode and Calendar Mode.There is option of MIX Mode in CubeMX but doesn’t seem working. Causing not to allow Alarm/Timer to configure and giving below error:  sAlarm->AlarmSubSecondMask               Details:1056964608               Default:1056964608               Decimal:1056964608               Hex:0x3f000000ICSR               Details:519               Default:519       &n

I tried doing an OBD2 request via Car's OBD2 port.I am able to see the CAN BUS traffic using an oscilloscope , just my request frames are rejected by car. I am using STM32h735G-DK development board to send OBD2 requests. It consists of an inbuilt FDCAN transceiver. Settings are fine (removed termination resistor as car already has two), baudrate is 500kbps  with 87.5% sample point. I am using the following code to send OBD2 request frames:I am able to receive CAN frames and able to log CAN frame frames it is just that frames sent are rejected. What am i doing wrong here?FDCAN Code excerpt: /* ============ 500 kbit/s Bit Timing Derivation ============ * * Step 1: FDCAN Kernel Clock * fCAN = 80 MHz (from Clock Configuration) * * Step 2: Prescaler * Prescaler = 10 * * Step 3: Time Quantum (tq) * tq = Prescaler / fCAN * tq = 10 / 80,000,000 Hz = 0.125 µs = 125 ns * * Step 4: Bit Segments (in TQ) * Sync Segment = 1 TQ (fixed, always 1) * Time Segment 1 = 12 TQ (Prop_