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STM32f030 SPI DMA Problem

eittinfo
Associate II

‎2020-01-08 05:04 PM

Hi

i wrote sample code to transfer data by spi and use dma

i test my code in 3 step

when dma transfer complete interrupt disable, when dma half transfer interrupt enable, and without interrupt

this is my code ,just i comment interrupt cmd function for test result:

first test without enable any dma interrupts:

you can see result is ok and data correct transfer.

0690X00000BvlYSQAZ.png

test 2,enable only transfer complete interrupt!:

#include "main.h"
#include <stdio.h>
 
static void SPI_Config(void);
 
#define SPIx_DR_ADDRESS                  0x4001300C
#define SPIx_TX_DMA_CHANNEL              DMA1_Channel3
#define SPIx_TX_DMA_FLAG_TC              DMA1_FLAG_TC3
#define SPIx_TX_DMA_FLAG_HT              DMA1_FLAG_HT3	
#define SPIx_TX_DMA_FLAG_GL              DMA1_FLAG_GL3
	
#define SPIx_RX_DMA_CHANNEL              DMA1_Channel2
#define SPIx_RX_DMA_FLAG_TC              DMA1_FLAG_TC2
#define SPIx_RX_DMA_FLAG_GL              DMA1_FLAG_GL2
 
#define DMAx_CLK                         RCC_AHBPeriph_DMA1
 
#define SPIx                             SPI1
#define SPIx_CLK                         RCC_APB2Periph_SPI1
#define SPIx_IRQn                        SPI1_IRQn
#define SPIx_IRQHandler                  SPI1_IRQHandler
 
uint8_t TransferBuffer[8] = { 0x80,0x0,0x0,0x0,0x0,0x0,0x0,0x81};
 
int main(void)
{
	SPI_Config();
  while (1)
  {
  }
}
 
static void SPI_Config(void)
{
	
	static GPIO_InitTypeDef	GPIO_InitStructure;
	static SPI_InitTypeDef	SPI_InitStructure;
	static DMA_InitTypeDef	DMA_InitStructure;
	static NVIC_InitTypeDef	NVIC_InitStructure;
	
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1,ENABLE);
	RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1,ENABLE);
	
	//PIN5	SCK
	//PIN7	MOSI
	GPIO_InitStructure.GPIO_Mode						=	GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_OType						=	GPIO_OType_PP;
	GPIO_InitStructure.GPIO_Pin							=	GPIO_Pin_5|GPIO_Pin_7;
	GPIO_InitStructure.GPIO_PuPd						=	GPIO_PuPd_UP;
	GPIO_InitStructure.GPIO_Speed						=	GPIO_Speed_50MHz;
	GPIO_Init(GPIOA,&GPIO_InitStructure);
	
	GPIO_PinAFConfig(GPIOA,GPIO_PinSource5,GPIO_AF_0);
	GPIO_PinAFConfig(GPIOA,GPIO_PinSource7,GPIO_AF_0);
	
	SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
  SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
  SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
  SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
  SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  SPI_InitStructure.SPI_CRCPolynomial = 7;
	SPI_Init(SPI1,&SPI_InitStructure);
	//SPI_Cmd(SPI1,ENABLE);
	
  /* DMA Configuration -------------------------------------------------------*/
  DMA_InitStructure.DMA_PeripheralDataSize	=	DMA_PeripheralDataSize_Byte;
  DMA_InitStructure.DMA_MemoryDataSize			=	DMA_MemoryDataSize_Byte;
  DMA_InitStructure.DMA_PeripheralInc				= DMA_PeripheralInc_Disable;
  DMA_InitStructure.DMA_MemoryInc						= DMA_MemoryInc_Enable;
  DMA_InitStructure.DMA_Mode								= DMA_Mode_Normal;
  DMA_InitStructure.DMA_M2M									= DMA_M2M_Disable;
	DMA_InitStructure.DMA_BufferSize					= (uint16_t)8;
	DMA_InitStructure.DMA_PeripheralBaseAddr 	= (uint32_t)SPIx_DR_ADDRESS;
	DMA_InitStructure.DMA_MemoryBaseAddr 			= (uint32_t)TransferBuffer;
	DMA_InitStructure.DMA_DIR									= DMA_DIR_PeripheralDST;
	DMA_InitStructure.DMA_Priority						= DMA_Priority_High;
	DMA_Init(SPIx_TX_DMA_CHANNEL, &DMA_InitStructure);
 
  /* Enable DMA1 Channel1 Transfer Complete interrupt */
  DMA_ITConfig(SPIx_TX_DMA_CHANNEL, SPIx_TX_DMA_FLAG_TC , ENABLE);
 
  /* Enable DMA1 channel1 IRQ Channel */
  NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_3_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure);
 
 	/* Clear DMA1 global flags */
	DMA_ClearFlag(SPIx_TX_DMA_FLAG_HT | SPIx_TX_DMA_FLAG_TC);
 
	/* Enable the SPI Rx and Tx DMA requests */
	SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Tx, ENABLE);
  
	/* Enable the DMA channels */
	DMA_Cmd(SPIx_TX_DMA_CHANNEL, ENABLE);
    
	/* Enable the SPI peripheral */
	SPI_Cmd(SPIx, ENABLE);
   
	/* Wait the SPI DMA transfers complete or time out */
  //while ((DMA_GetFlagStatus(SPIx_TX_DMA_FLAG_TC) == RESET))
  //{}
}
 
void DMA1_Channel2_3_IRQHandler(void)
{
  if(DMA_GetITStatus(SPIx_TX_DMA_FLAG_TC))
  {
    /* DMA1 finished the transfer of SrcBuffer */
    DMA_ClearFlag(SPIx_TX_DMA_FLAG_TC);
	}
	if(DMA_GetITStatus(SPIx_TX_DMA_FLAG_HT))
  {
    /* DMA1 finished the transfer of SrcBuffer */
    DMA_ClearFlag(SPIx_TX_DMA_FLAG_HT);
	}
	if(DMA_GetITStatus(SPIx_TX_DMA_FLAG_GL))
  {
    /* DMA1 finished the transfer of SrcBuffer */
    DMA_ClearFlag(SPIx_TX_DMA_FLAG_GL);
	}
}

and result is:

0690X00000BvlYXQAZ.png

and you can some extraaaa invalid clock generatee end of data transferedd!!

and finaly when half transfer and complete transfer enable i got severaaal extra clock!

following by this code:

#include "main.h"
#include <stdio.h>
 
static void SPI_Config(void);
 
#define SPIx_DR_ADDRESS                  0x4001300C
#define SPIx_TX_DMA_CHANNEL              DMA1_Channel3
#define SPIx_TX_DMA_FLAG_TC              DMA1_FLAG_TC3
#define SPIx_TX_DMA_FLAG_HT              DMA1_FLAG_HT3	
#define SPIx_TX_DMA_FLAG_GL              DMA1_FLAG_GL3
	
#define SPIx_RX_DMA_CHANNEL              DMA1_Channel2
#define SPIx_RX_DMA_FLAG_TC              DMA1_FLAG_TC2
#define SPIx_RX_DMA_FLAG_GL              DMA1_FLAG_GL2
 
#define DMAx_CLK                         RCC_AHBPeriph_DMA1
 
#define SPIx                             SPI1
#define SPIx_CLK                         RCC_APB2Periph_SPI1
#define SPIx_IRQn                        SPI1_IRQn
#define SPIx_IRQHandler                  SPI1_IRQHandler
 
uint8_t TransferBuffer[8] = { 0x80,0x0,0x0,0x0,0x0,0x0,0x0,0x81};
 
int main(void)
{
	SPI_Config();
  while (1)
  {
  }
}
 
static void SPI_Config(void)
{
	
	static GPIO_InitTypeDef	GPIO_InitStructure;
	static SPI_InitTypeDef	SPI_InitStructure;
	static DMA_InitTypeDef	DMA_InitStructure;
	static NVIC_InitTypeDef	NVIC_InitStructure;
	
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1,ENABLE);
	RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1,ENABLE);
	
	//PIN5	SCK
	//PIN7	MOSI
	GPIO_InitStructure.GPIO_Mode						=	GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_OType						=	GPIO_OType_PP;
	GPIO_InitStructure.GPIO_Pin							=	GPIO_Pin_5|GPIO_Pin_7;
	GPIO_InitStructure.GPIO_PuPd						=	GPIO_PuPd_UP;
	GPIO_InitStructure.GPIO_Speed						=	GPIO_Speed_50MHz;
	GPIO_Init(GPIOA,&GPIO_InitStructure);
	
	GPIO_PinAFConfig(GPIOA,GPIO_PinSource5,GPIO_AF_0);
	GPIO_PinAFConfig(GPIOA,GPIO_PinSource7,GPIO_AF_0);
	
	SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
  SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
  SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
  SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
  SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  SPI_InitStructure.SPI_CRCPolynomial = 7;
	SPI_Init(SPI1,&SPI_InitStructure);
	//SPI_Cmd(SPI1,ENABLE);
	
  /* DMA Configuration -------------------------------------------------------*/
  DMA_InitStructure.DMA_PeripheralDataSize	=	DMA_PeripheralDataSize_Byte;
  DMA_InitStructure.DMA_MemoryDataSize			=	DMA_MemoryDataSize_Byte;
  DMA_InitStructure.DMA_PeripheralInc				= DMA_PeripheralInc_Disable;
  DMA_InitStructure.DMA_MemoryInc						= DMA_MemoryInc_Enable;
  DMA_InitStructure.DMA_Mode								= DMA_Mode_Normal;
  DMA_InitStructure.DMA_M2M									= DMA_M2M_Disable;
	DMA_InitStructure.DMA_BufferSize					= (uint16_t)8;
	DMA_InitStructure.DMA_PeripheralBaseAddr 	= (uint32_t)SPIx_DR_ADDRESS;
	DMA_InitStructure.DMA_MemoryBaseAddr 			= (uint32_t)TransferBuffer;
	DMA_InitStructure.DMA_DIR									= DMA_DIR_PeripheralDST;
	DMA_InitStructure.DMA_Priority						= DMA_Priority_High;
	DMA_Init(SPIx_TX_DMA_CHANNEL, &DMA_InitStructure);
 
  /* Enable DMA1 Channel1 Transfer Complete interrupt */
  DMA_ITConfig(SPIx_TX_DMA_CHANNEL, SPIx_TX_DMA_FLAG_TC | SPIx_TX_DMA_FLAG_HT , ENABLE);
 
  /* Enable DMA1 channel1 IRQ Channel */
  NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_3_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure);
 
 	/* Clear DMA1 global flags */
	DMA_ClearFlag(SPIx_TX_DMA_FLAG_HT | SPIx_TX_DMA_FLAG_TC);
 
	/* Enable the SPI Rx and Tx DMA requests */
	SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Tx, ENABLE);
  
	/* Enable the DMA channels */
	DMA_Cmd(SPIx_TX_DMA_CHANNEL, ENABLE);
    
	/* Enable the SPI peripheral */
	SPI_Cmd(SPIx, ENABLE);
   
	/* Wait the SPI DMA transfers complete or time out */
  //while ((DMA_GetFlagStatus(SPIx_TX_DMA_FLAG_TC) == RESET))
  //{}
}
 
void DMA1_Channel2_3_IRQHandler(void)
{
  if(DMA_GetITStatus(SPIx_TX_DMA_FLAG_TC))
  {
    /* DMA1 finished the transfer of SrcBuffer */
    DMA_ClearFlag(SPIx_TX_DMA_FLAG_TC);
	}
	if(DMA_GetITStatus(SPIx_TX_DMA_FLAG_HT))
  {
    /* DMA1 finished the transfer of SrcBuffer */
    DMA_ClearFlag(SPIx_TX_DMA_FLAG_HT);
	}
	if(DMA_GetITStatus(SPIx_TX_DMA_FLAG_GL))
  {
    /* DMA1 finished the transfer of SrcBuffer */
    DMA_ClearFlag(SPIx_TX_DMA_FLAG_GL);
	}
}

in above code i enable transfer complete interrupt & half transfer data interrupt and i got this result

0690X00000BvlYNQAZ.png

whats problem????

what's m mistake???

thnx

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2 REPLIES 2
KnarfB
Principal III

‎2020-01-08 09:18 PM

It would be nice if you correct your code indention / tabify.

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DSlob.1
Associate II

‎2020-04-20 06:54 AM

Hi!

That could be a feature of SPI bus on F030 series, even others families.

Firstly, you'd better cast DR register in SPI, if you use 8-bit width bus.

Secondly, it's quit good to wait until read DR register.

/* Send command and skip dummy byte */
 
*(__IO uint8_t*)&SPI1->DR = cmd;
while (!(READ_BIT(SPI1->SR, SPI_SR_TXE)));
while (!(READ_BIT(SPI1->SR, SPI_SR_RXNE)));
SPI1->DR;

Whereas using DMA, you should wait while transfer is complete.

uint8_t pump = 0;
 
/* Enable DMA transfer */
SET_BIT(SPI1->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
CLEAR_BIT(DMA1_Channel3->CCR, DMA_CCR_MINC);
DMA1_Channel3->CMAR = (uint32_t)&pump;
DMA1_Channel2->CNDTR = cnt;
DMA1_Channel3->CNDTR = cnt;
SET_BIT(DMA1_Channel2->CCR, DMA_CCR_EN);
SET_BIT(DMA1_Channel3->CCR, DMA_CCR_EN);
 
/* wait DMA complete transfer and clear correspondent flag */ 
while (!(READ_BIT(DMA1->ISR, DMA_ISR_TCIF3)));
SET_BIT(DMA1->IFCR, DMA_IFCR_CTCIF3);
 
/* wait SPI to release */ 
while (READ_BIT(SPI1->SR, SPI_SR_BSY)); 
 
/* Disable DMA transfer */
CLEAR_BIT(SPI1->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
CLEAR_BIT(DMA1_Channel2->CCR, DMA_CCR_EN);
CLEAR_BIT(DMA1_Channel3->CCR, DMA_CCR_EN);
 

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