Product forums

I have this hardware. X_NUCLEO-53L9A1 and Nucleo-H563ZI. I installed the drivers and flashed GrabRel binary into the STM32H5. I open Jarv3D but No hardware detected. 

Hi, its my first postLet me introduce myself, my name is Manuel, I am from Spain (English is not my native language) and I have joined the forum looking for help. My profile is that of a maker with very little programming experience (an AI maker). AI helped me a lot to make the programs I’m migrating a project from Arduino to an STM32 Blackpill; I managed to get it working on Arduino.Sim racing pedalsThe pedals are a potentiometer (for the accelerator) and a loaded cell (for the brake). Well, what I thought would be the hardest thing to do—getting the STM32 Blackpill to “read” those sensors—I’ve managed to do. I press buttons on the console and see the changes… but what was easy on Arduino—turning it into a game display for Windows—I’m not being able to do on the STM32… the libraries that Gemini recommends are either missing or don’t work… I’m looking for help getting Windows to recognize my STM32 as a gaming device. I thought this part would be easier; the Blackpil

I have an STM32WB05 board (approx 30mm x 30mm) with the following major components :STM32WB05KZV6TR, LTC4095EDC, LTC3531ES6-3.3, LSM6DSV80XTRI have followed the reference design for running on SMPS.When running directly from VDD (3.3V) it works great. Advertising, connecting reliably.When running through the BuckBoost it does not advertise (with either a LiPo feeding or a bench PSU at 4V or via the USB charging circuit) . No errors, no obvious issues.. just cant see or connect to it over BLE.  I checked that TX_SEQUENCE was active and it is. Registers look the same for both modes. VDD does have some noise but it is within spec for the LTC3531 in burst mode. I purchased a TinySA Ultra+ and have taken traces. I can see the advertising (attached)Really need to help to diagnose.. is it a lost cause having the BuckBoost on a board this small?Let me know how to configure the TinySA also for more detailed traces as i am struggling (so is Claude!) 

Hi all,I'm stuck on debugging with the STM32N6570-DK and could use some help. I've spent a few days on it and I'm running out of ideas.My setup:- Board: STM32N6570-DK (Rev B, device ID 0x486)- STM32CubeIDE 2.2.0 (ST-LINK GDB server 7.14.0)- STM32CubeProgrammer 2.23.0- ST-LINK FW: V3J17M11- CubeN6 FW package V1.4.1- Project made in CubeMX with FSBL + Appli (Appli runs from external flash)- Boot switches set for dev boot (BOOT1 = 1)What's happening:Most of the time the debug session doesn't even start. I get:"Target unknown error 32Error in initializing ST-LINK device.Reason: Unknown. Please check power and cabling to target."Sometimes it does connect. When I launch the Appli debug config, it programs the Appli into external flash fine (I can see it erasing sectors and downloading), but then it stops with "Setup exceptions" and the core is sitting at 0x18003a1a (boot ROM area, no source).When I launch the FSBL debug config (with the Appli .elf added in the Startup tab), the GDB server co

Hello,I found an apparent inconsistency regarding the Flash endurance of STM32G0B0.The STM32G0B0 datasheet (DS13565 Rev.3) specifies a minimum Flash endurance of 1 kcycle (1000 program/erase cycles).However, AN4894 Rev.12, Table 5, specifies 10 kcycles for the STM32G0 series, with the following 1 kcycle exceptions:STM32G030x6/x8 STM32G070CB/KB/RBSTM32G0B0 is not listed among these exceptions, which seems to indicate that 10 kcycles should apply to it according to AN4894.For comparison, the STM32G0B1 datasheet (DS13560 Rev.6) specifies a minimum Flash endurance of 10 kcycles, consistent with AN4894.Could ST please clarify which value should be used for STM32G0B0: 1 kcycle or 10 kcycles?If 1 kcycle is the correct value, should STM32G0B0 also be listed as an exception in AN4894 Table 5?Thank you.

Heyho,next G4 problem…G431 with an audio ADC (TI’s PCM1822) connected to SAI1_Block_A, SAI is in master receiver mode, meaning it provides the I2S clocks for the external ADC.DMA is used, circular, 32-bit.Signals looking good at all audio sampling frequencies, up to 192 kHz.Problem:always at 1st start, and every now and then after a SAI + DMA stop and restart, somehow the 2 ADC channels are swapped.I checked all I2S signals with a scope, and data is always where it’s supposed to be.I can check the DMA buffer, it’s definitely the SAI.BAD buffer / channels swapped, signal connected to RIGHT ( = R ) channel only,so LEFT should be 0 L R L R L R L R000: +0.31 -0.00 +0.37 +0.00 +0.38 -0.00 +0.36 -0.00008: +0.30 -0.00 +0.20 -0.00 +0.09 -0.00 -0.04 -0.00GOOD buffer: L = 0, R = signal L R L R L R L R000: +0.00 +0.26 +0.00 +0.16 +0.00 +0.04 -0.00 -0.09008: +0.00 -0.20 -0.00 -0.30 -0.00 -0.36 +0.00 -0.38our analyzer: Here are the D

Hi,I am trying to understand the temporal structure of a single VL53L9CX depth-map acquisition for measurements of moving objects.From UM3683 and the register documentation, I understand that a frame is produced using 6 or 7 ranging steps, with successive channel illuminations within those steps.I have a few questions: Are all 54 × 42 spatial zones effectively observed over the same sequence of ranging steps, or are different zones/groups of zones acquired at different times within a frame? If there is any spatially varying acquisition timing, is the mapping from zone (row, column) to acquisition step/channel deterministic and documented? Is the timing of each ranging step and Channel 0/1 illumination deterministic relative to an external SYNC_IN trigger? If so, is there documentation giving these offsets or enough information to calculate them from the configured number of shots/blanking periods? Are intermediate 54 × 42 measurements available after individual ranging steps or c

Hello, We are trying to implement ECDSA where cloud generates Public and Private key and calculates hash of our firmware using SHA 256 and Sign the firmware using P256 method. I am using ECDSA API to verify the firmware in our bootloader I am facing some issues in verification I am using all the things based on example project prime256v1.c file for constantsuint32_t verify_firmware_signature_P256( const uint8_t* hash ){  PKA_ECDSAVerifInTypeDef in = {0};   in.primeOrderSize  = 32U;            // 256 bits = 32 bytes  in.modulusSize   = 32U;            // 256 bits = 32 bytes  in.coefSign     = 1U;             // 1 indicates a is negative (-3)  in.coef       = prime256v1_absA;      // Coefficient |a| = 3  in.modulus     = prime256v1_Prime;      // Prime p  in.basePointX    = prime256v1_GeneratorX;   // Generator Gx  in.basePointY    = prime256v1_GeneratorY;   // Generator Gy  in.primeOrder    = prime256v1_Order;      // Curve order n  in.pPubKeyCurvePtX = pub_x;           // Public key X 

Respected Sir/ Mam,Can you please tell me the maximum current for all peripharals enable in sleep mode for stm32U5G9, along with the dedicated settings mode.Thankyou

Hello,We are investigating a recurring failure of an L7983 used in a medical device.Application:VIN ≈ 40 V VOUT = 5 V L = 68 µH Cout = 2.2 µF LCM mode Very light load conditions possibleFailure mode:5 V output lost. After removing the output inductor, LX remains shorted to GND. Resistance LX-GND ≈ 2.5 Ω. High-side MOSFET appears intact (no abnormal resistance between VIN and LX). Failure seems limited to the internal low-side MOSFET.Field observations:The failure is always preceded by a battery-related error. Batteries are often found degraded or unable to charge correctly. Similar failures have also occurred during production.Tests performed:Startup without battery. Startup with low battery conditions. Long-duration operation with low battery voltage. Heavy battery discharge during operation. Various startup sequences.No test has reproduced the failure so far.Measurements:LX peak ≈ 50 V. Undershoot down to approximately -1.7V No obvious overcurrent event detected.Questions:Have you se

Hello,I have successfully implemented the High Sensitivity Observer using the following configuration:MCU: STM32G474RETx, 170 MHz Power board: EVLDRIVE102BH, configured as a Custom Power Board in STM32 Motor Control Workbench Phase-voltage sensing configured according to the HSO hardware requirementsHSO is operational with this configuration. However, I am observing rotor alignment movement and vibration during startup, before stable closed-loop operation is established.Could you please clarify the expected HSO startup behavior?What startup stages are performed before the HSO reaches stable closed-loop operation? What is the expected extent of rotor movement during the initial alignment and observer-lock sequence? Is some vibration or oscillatory rotor movement expected during this stage? How does the selected startup method, such as PolPulse or RSDC, influence rotor displacement and vibration? How significantly do the motor parameters, mechanical load, inertia, friction, and initial r

Hi, I’m trying to use a VL53L9 with a microcontroller which have 128kB of RAM. For this I use the STM32CubeExpansion_53L9A1_V1.0.0 package. The problem is the streaming library delivered within the package is not made for low RAM usage. It’s stack usage is high. Too high for the microcontroller I use.Is there VL53L9 software implementation available for low RAM usage ? Regards,Nicolas

 SummaryWe program a slave STM32H757 through its system bootloader over SPI (AN4286), driven by a second STM32H757 acting as SPI master. About 20 % of our production boards cannot be programmed: after the 0x5A synchronization byte, the bootloader returns the byte 0xA5 on every poll and never 0x79 (ACK) or 0x1F (NACK). The other 80 % of the boards are programmed reliably with exactly the same master firmware.Bootloader version (0x91), device ID (0x450) and silicon revision (Rev V) are identical on working and failing boards. The failing boards are otherwise fully functional: firmware loaded through JTAG/SWD runs normally on them. Register dumps taken through SWD show that the bootloader has selected SPI2 and is running, but that the SPI2 slave is in TX underrun (SR.UDR = 1) on failing boards and not on working boards. Hardware configurationItem Value Slave device STM32H757XI , device ID 0x450, Rev V, bootloader V9.1 (0x91) (identical on working and failing boards) Slave clock 25

Hello everyone,I am having an issue with EEPROM Emulation initialization in my STM32 project.I am currently trying to implement the EEPROM Emulation utility using STM32CubeMX2 v1.1.0.The program starts with mx_system_init(), which initializes the peripherals and other required modules such as FLASH, RCC, etc. After that, I call mx_eeprom_emulation_init(). During this initialization, the MCU enters a HardFault.Detailed informationThe call hierarchy is:main() → mx_eeprom_emulation_init() → EE_Init() → EE_FLITF_Init() → Page_GetState() → EE_ITF_FLASH_ReadData()Inside EE_ITF_FLASH_ReadData(), the code tries to access address:0x09000018and immediately enters a HardFault.I also analyzed the fault using the Fault Analyzer in STM32CubeProgrammer. The results are:SCB_BFAR: 0x09000018 BusFault: Precise data access error (PRECISERR) The BusFault is escalated to a HardFault (FORCED)I also checked the EDATA_EN option bit in STM32CubeProgrammer, and it appears to be enabled correctly.At this point,

Hi,I am working on flash memory protection mechanisms on STM32 microcontrollers (specifically STM32L476RG) and I have two closely related questions that I want to confirm at the hardware level.I understand that:RDP (Readout Protection) levels are stored in the Option Bytes The Option Byte Loader (OBL) reads these values at every power-on reset, before any user code executes Under RDP1, external debugger access to flash is blocked but the CPU can still read its own flash normally Under RDP2, the debug port itself is permanently disabledMy question is: what specific hardware block is actually responsible for enforcing this protection? and blocking the read request to secure flash region ?Specifically I want to confirm:Is this enforcement done purely in silicon/hardware, with no software component involved? Under RDP1, why does the CPU running normal user code still get real flash data, while an external SWD/JTAG debugger gets blocked — is this distinction made by the flash controller its

Background info:I am looking at ditching Microchip and moving to STM32 H5 or H7.My application requires networking and support for HTTP server, SNTP client, SNMP V2 & V3 agent and SMTP client with TLS etcI am looking at H5/H7 primarily because of the larger RAM to support a TFT display of 320x240 or possibly 480x320. I only need 16 bit color.  Now the question:I am evaluating my choices for a TCP/IP stack. The “free” contenders appear to be LWIP and Azure (NetX) and I have seen some not free offerings such as CyloneTCP and Mongoose.I suspect that any of them can be made to work with enough effort but in the interest of not wasting company resources I thought it prudent to see who has had successes and frustrations with the offerings that I have been exploring.Yes. I am the guy who asks how deep the water is before I jump in….   

I am using an LSM6DSV320X (STEVAL-MKI251A) read over SPI.Settings: high-performance mode, ODR 1.92 kHz, gyroscope ±4000 dps, LPF1 off, low-g ±16 g, high-g ±320 g, BDU = 1.Problem: after a sharp mechanical shock the gyroscope X and Y outputs become noise swinging up to ±4000 dps from one sample to the next. It lasts from 60 ms to 1.7 s and then stops abruptly, as shown in the first picture. The shock is along Z, about 250 g for about 2 ms.- Y is always affected, X nearly always, Z hardly at all.- Both accelerometers and the temperature output are normal during it. All FIFO tags are valid and no samples are lost. Also, here is a comparison of an ISM330DHCX with the same strikes; only small gyro ringing is observed.What is the issue, and is the new LSM6DSK320X immune to this? 

I’m using the OEMiROT_Boot example with the OEMiROT_Appli_TrustZone secure and non-secure example applications.I can build the code and correctly provision the NUCLEO-H563ZI board. The applications run correctly and I can attach to the secure and non-secure applications using the debugger. If I use regression to return the board to the OPEN state, I am not able to debug the applications by downloading the code from the debugger. When I try, I receive HardFault when the secure app tries to switch to the non-secure app. I have followed the directions in application note “AN5421” when configuring the secure and non--secure projects. I’m using V9.70.4 of the IAR Embedded Workspace. Using the debugger, I can see the correct code in the secure and non-secure addresses.Below is the debug log.Thu Oct 01, 2026 16:20:47: IAR Embedded Workbench 9.70.4 (C:\iar\ewarm-9.70.4\arm\bin\armproc.dll)Thu Oct 01, 2026 16:20:47: Loaded macro file: C:\iar\ewarm-9.70.4\arm/config/debugger/ST/STM32H5xx.dmacThu

I am wanting advice on the placement and routing of the power bypass capacitors on a STM32U5G9 UFBGA144 processor. Are there any layout reference designs? I am routing a 6 layer board. 

Described below method is intended to perform correction of the static ADC’s non-linearity in software using LUT. It requires pure sine-wave source only, that can be generated by any available analog circuitry. Basically, it corrects non linearity induced by signal conversion analog front end all together, that includes ADC and it’s drivers, signal conditioning / amplification stages, inputs protection, etc. There is a way to do the same linearity correction by applying linear ramp voltage and generating error LUT table. New method is using sine-wave, and consequently has a few advantages over “classic” : 1. Linearity of the sine-wave is much more easier to verify down to -140 -160dB (0.1 – 0.01 ppm) using simple tween-T notch filter. 2. Analog front end may include DC blocking capacitors. 3. Calibration test signal could function in the “working band” area, and some complex dynamic distortion of the drivers (due to fall of the AOL over frequency, output stage

Hello everyone, I have the following use case: I want to receive raw data via Ethernet, which works fine, but I have a problem: When I send 100 bytes, I only receive 14 bytes in my software on the MCU (STM32H7S3L8). I was able to fix this by settingAutomaticPadCRCStrip to DISABLE. Now I receive 104 bytes, which is also not the desired behavior. After a little research, I found out that the 4 bytes are CRC, so I continued searching. After some searching, I found the CRCStripTypePacket property and set it to ENABLE, but unfortunately this property has no effect. What do I need to do to get my 100 bytes but not the CRC? Do I need to set something else? Is this a bug? Please help me, I'm stuck.Thanksstm32h7rsxx-hal-driver 1.2.1Best regards,Paul B

Hello,I understand that ToF sensors inherently have limited performance under daylight conditions. However, I would like to know which ST ToF sensor family currently offers the best performance in daylight, regardless of whether it is a single-point or multi-zone sensor.The VL53L9 series looks very promising for our application, but unfortunately, its cost is above our target budget. Therefore, I am looking for a more cost-effective alternative that still provides good performance under daylight conditions.A wider FOV would be preferable for our application.Would it be reasonable to select a sensor based primarily on its maximum specified detection range? If so, the VL53L1 series seems to be a good candidate. However, I am not sure whether the maximum specified range is the best parameter to use when comparing sensors for real-world daylight performance.I also assume that a wider FOV reduces the number of photons received per unit area, which could potentially reduce the sensor's perfo

I’m using X-NUCLEO-IHM08M1 with NUCLEO-G474RE evaluation board for FOC speed control of PMSMs.My main sensor is SE461000AB10030 encoder (I do not intend to use a sensorless system) and I’ve set it to 1000 ppr on the MC Workbench. With other commercial inverters, I’ve always used it with only its A, B and Z outputs (not the differential inverted ones)When I power up via usb the evaluation board (DC bus off), I turn the rotor with my hand and connect the oscilloscope to CN7_17 and CN10_31, I can see the encoder pulses correctly; and when I turn the encoder by hand through one mechanical revolution (360 degree), TIM2->CNT goes from 0 to 4000, as it should.  The problem is that as soon as I press START (blue push botton), the rotor gives a brief slow jolt, the state machine switches to “alignment” and finally enters “run” mode without any faults; the currents across the three phases are these         but the rotor is stuck (it isn't moving...)  On the hardware side, I followed the chang

My board does not have the default firmware anymore and I do not have a backup of it either.  I have the source code and the HAL driver and have tried for hours to get the code to compile.  I get many errors for various HAL header files and the source does not include a HAL config file.  Is it possible to get the compiled default firmware as it is for various other Discovery boards?

Although the data sheet specifies a field of view of either 27 degrees or 36 degrees (depending on where about it is mention in the data sheet, I have found the effective FOV to be aound 8 degrees. Setup as follows  sensor.setDistanceMode(VL53L1X::Medium); sensor.setMeasurementTimingBudget(33000);  sensor.setROISize(16, 16); startcontnuous(100);with all other sensor settings at defaultA large all black target set up at 140 cm from the sensor, reulted in a invalid reading. I then moved a white target in from one side until a valid reading was made, marked the position and repeated this for the other side top and bottom.This resulted in an area in the middle of about 20 x 25 cm which represents a FOV of around 8 degrees. Any target outside this selected area will reults in an invalid reading (i..e canot be trusted). Targets with in ths area will be detected although the accuracy is very dependent on the refectivity of the oblect, the variation between measured and actual by as much as 30