About geirlandunico

geirlandunico · 2024-09-03

Hi all, We have an STM32H735VGH6 on a custom board with a LAN8742a PHY chip to allow ethernet communication. This custom board is minimally tested so it's possible that there's a hardware issue though I'm uncertain where the issue would be. I gener...

geirlandunico · 2024-08-27

I have a STM32H7 with it's FMC signals hooked up to an FPGA in order to allow the microcontroller to peak/poke into FPGA registers. I had a FIFO in this address space that, if read, would automatically increment to the next value. I was noticing on...

geirlandunico · 2024-09-04

Yeah the attempt to invalidate the D-Cache seems like a bug in the auto-generated code. It's calling the invalidate line in HAL_ETH_RxLinkCallback with no check to see if D-Cache is enabled like the one you posted. Within the invalidate D-Cache fun...

geirlandunico · 2024-08-28

Just set this up and ran it and it also solved my problem (so that I don't have to disable IRQs). Thank you! Definitely a cleaner solution. I'm still wondering though. Do you know why, pre MPU change, I was seeing this issue on reads but not write...

geirlandunico · 2024-08-28

To be honest I'm still new with the STM32. I don't believe I changed anything in regards to the MPU settings. Doing some googling, it seems like the memory range that I'm using for it (0x60000000-0x6FFFFFFF) defaults to Normal instead of Device or ...

User statistics

User Activity

Ethernet/LwIP On Custom Board Issue With D-Cache

FMC Read Duplicates During Interrupt But Writes Seemingly Don't

Re: Ethernet/LwIP On Custom Board Issue With D-Cache

Re: FMC Read Duplicates During Interrupt But Writes Seemingly Don't

Re: FMC Read Duplicates During Interrupt But Writes Seemingly Don't