About Brian H

Brian H · 2024-11-12

Just wondering if anyone else sees this on the regular.I have a custom board with an STM32F107 MCU (but I see this across hardware projects with various ST MCUs).I have the ST-LINK/v2 doing SWD to the MCU and it's connected to the host PC through a S...

Brian H · 2024-10-30

I'm using the ST Cube environment (IDE + MX) to configure the SPI2 peripheral in Full-Duplex Master mode on a STM32F105VBHX chip.It seems like the peripheral is not driving the NSS (chip select) pin (PB12). When the pin is selected for SPI2_NSS and ...

Brian H · 2024-10-30

I am using STM32F105xx family, working with HAL_SPI API. I have discovered that the call to HAL_SPI_Receive_IT causes whatever data is in the provided buffer to be clocked out on MOSI. This issue is also discussed to some extent in this thread, but...

Brian H · 2024-08-05

Hello. I am working with a STM32H563IIKX, connected to an external Macronix MX30LF2G28AD NAND Flash chip. I have configured the FMC for NAND operation with what I think are correct parameters (this is completely new to me).I thought I'd try a very ...

Brian H · 2024-04-23

Developing on an STM32H563ZI chip with Cube IDE and ST-Link V2. DEBUG is configured as JTAG with Trace Syncro (4 bits), which is 4-wire JTAG (JTMS, JTCK, JTDI, and JTDO). My project has allocated pin PB4(NJTRST) as a GPIO. If left unconfigured, de...

Brian H · 2024-11-27

This is good news, as it implies that there is not a limitation in the h5 silicon.When should we expect this version to be published through the in-app update channels? Right now, the latest update package I'm being shown only includes MX 6.12.1.202...

Brian H · 2024-11-13

Yeah, I know that's the most-likely-by-far explanation...the way my workstation is set up means plugging straight into the computer is a challenge. I guess I was hoping for some other option! :) Maybe I can get a longer A-to-mini-B cable and try th...

Brian H · 2024-10-31

I know how SPI works. Yes, I know SPI is full-duplex. Yes, I know the slave is always paying attention to MOSI when the clock is pulsing (if SS is asserted), and the master is always paying attention to MISO. My complaint is that a method named "R...

Brian H · 2024-10-30

Reading further in RM0008, I see: I've already encountered some odd behavior in my code where certain callbacks are not being called reliably from the HAL layer. It could be that the code in the HAL layer that disables SPI after a transaction is als...

Brian H · 2024-10-30

That's not true at all.From DS6014:From RM0008:You're pointing to the SSM and SSI bits, which affect the behavior of NSS in slave mode. In slave mode, NSS is an input. I am using the peripheral in master mode, in which NSS is an output. Furthermor...

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Frequent ST-LINK/v2 Hang with Solid Green LED

STM32F105xx SPI2 Does Not Drive NSS Pin High when Idle

HAL_SPI_Receive_IT Also Transmits

SWD lost when accessing NAND via FMC

Debug Connection Lost if NJTRST Set to Output

Re: STM32H5 does not have a DQS line for HYPERBUS

Re: Frequent ST-LINK/v2 Hang with Solid Green LED

Re: HAL_SPI_Receive_IT Also Transmits

Re: STM32F105xx SPI2 Does Not Drive NSS Pin High when Idle

Re: STM32F105xx SPI2 Does Not Drive NSS Pin High when Idle