I just received a new NUCLEO-H743ZI2, with the Rev V silicon. According to AN5312, the clock can go up to 480MHz (but requires Vcore level VOS0) and the ADC clock has an extra divider.
I'm using STM32CubeMX v 5.2.1 with the latest 1.4.0 HAL for the H7
How can I make sure that the code being generated is correct for the Rev V silicon?
Also, what's the max ADC clock frequency in Rev V? It used to be 36MHz in Rev Y, but it seems to be 39MHz in Rev V now (for 12 bit conversions). Is that correct? And how do I set adc_ker_ck to 50MHz in CubeMX? There seems to also be a new ADC mode for direct channels that goes up to 50MHz, but only for 4 channels, and I plan to use 6 channels for my project. But for some reasons, now Rev V must use 2.5 samples rate, dropping from 4.5Msps on Rev Y at 36MHz to 4.30Msps on Rev V with 39MHz clock.
I definitely love being able to use higher core clock and ADC clock, but the changes between Rev Y and V are really confusing to me and how to ensure CubeMX knows about the right revision (I could not find a setting). The amount of changes in the ADC also seem quite staggering for just a silicon revision
