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STM32F446 - why PB12 conflicts with USB PHY?

Pavel A.
Evangelist III
Posted on March 07, 2018 at 00:16

Why CubeMX 4.24 says that PB12 conflicts with USB_OTG_HS when external HS PHY is not is use?

The MCU is F446ZCT, its USB HS core is in FS, host only mode, Activate_SOF and Activate_VBUS unchecked.

PB12 can have two alternate functions for USB HS core - but both are related only to HS mode, correct?

So why conflict with the PHY in FS internal PHY mode?

(and, by the way, what does ''Activate_VBUS'' in host mode? I use a different output pin to switch VBUS to the port).

Thanks,

-- pavel

0690X00000609y0QAA.png

#usb-fs #cubemx-v4.24
1 ACCEPTED SOLUTION

Accepted Solutions
Khouloud GARSI
Lead II
Posted on March 07, 2018 at 18:53

Hi

pavel_a

‌,

On the datasheet, we are mentioning that the STM32F446 MCU have:

  • USB 2.0 full-speed device/host/OTG controller with on-chip PHY : (OTG1_FS through GPIOA ).
  • USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY (OTG2_FS through GPIOB) and ULPI (OTG2_HS).

If you are using the second on chip FS PHY (GPIOB), the related pins are described as HS because they are linked to the USB 2.0 high-speed/full-speed device/host/OTG controller.

On the datasheet, you may notice that the PB12 is the OTG_HS_ID in the OTG2_FS peripheral.

You may also notice that also PB14 and PB15 are mentioned as ''USB_OTG_

H

S_DM'' and ''USB_OTG_

H

S_DP''.

0690X00000609zlQAA.png

Thus, the if you are using the USB FS PHY through the GPIOB port, the PB12 should not be used by another peripheral.

Khouloud.

View solution in original post

7 REPLIES 7
Khouloud GARSI
Lead II
Posted on March 07, 2018 at 18:53

Hi

pavel_a

‌,

On the datasheet, we are mentioning that the STM32F446 MCU have:

  • USB 2.0 full-speed device/host/OTG controller with on-chip PHY : (OTG1_FS through GPIOA ).
  • USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY (OTG2_FS through GPIOB) and ULPI (OTG2_HS).

If you are using the second on chip FS PHY (GPIOB), the related pins are described as HS because they are linked to the USB 2.0 high-speed/full-speed device/host/OTG controller.

On the datasheet, you may notice that the PB12 is the OTG_HS_ID in the OTG2_FS peripheral.

You may also notice that also PB14 and PB15 are mentioned as ''USB_OTG_

H

S_DM'' and ''USB_OTG_

H

S_DP''.

0690X00000609zlQAA.png

Thus, the if you are using the USB FS PHY through the GPIOB port, the PB12 should not be used by another peripheral.

Khouloud.

Posted on March 07, 2018 at 22:12

Thank you,  Khouloud

-- pa

Posted on March 08, 2018 at 01:30

Khouloud,

in the opening post, Pavel wrote:

host only mode

What would be the function of ID pin in host-only mode?

Host only

– The force host mode bit (FHMOD) in the OTG USB configuration register

(OTG_GUSBCFG) forces the OTG_FS/OTG_HS core to work as a USB host-only.

In this case, the ID line is ignored even if present on the USB connector.

Jan

Posted on March 08, 2018 at 12:24

Hi Jan,

Let me check this point. I will come back to you ASAP.

Khouloud.

Posted on March 09, 2018 at 10:00

Hello,

Waclawek.Jan

‌, Ihave checked this point and you are right.

pavel_a

‌,the yellow warning on CubeMX indicates that at least one mode configuration is no longer available (Colored in red: OTG/Dual_Role_Device in your case).

I apologize if my first answer was misleading. The good news is, if you're in 'Host only' mode, the PB12 pin could be used by other peripherals.

Khouloud.

Posted on March 09, 2018 at 17:50

Thank you.

Posted on March 12, 2018 at 10:22

You're always welcome