I2C speed problems

[JonConesa]

Hi everyone,

I’m currently working on an I2C communication setup using the Nucleo-H753ZI DK but the cubeMx document is for the STM32H743BIT (the MCU for my custom board) and aiming to run it in Fast Mode (400 kHz). However, when configuring the I2C clock speed to 400 kHz, the CLK signal becomes unstable, as shown in the attached image.

To ensure the setup is functioning correctly, I ran tests with I2C configured at 100 kHz, and the communication works perfectly in that case.

I’ve also included an image of the system clock configuration in case there’s something that could be optimized.

Does anyone know what might be causing the instability in the CLK signal, preventing proper communication at 400 kHz?

Thanks in advance for your help!

[Andrew Neil]

What pullup value are you using?

Look at the signal on an oscilloscope to see what's happening:

https://electronics.stackexchange.com/a/473799

[TDK]

Increase the logic analyzer sample rate. Looks like it's just too slow to capture things at the resolution you're expecting. Compare sample rate to time between edges. Probably you only have 1-2 samples per pulse here.

[JonConesa]

Thanks a lot for your response!

Regarding the pull-up, I am using the MCU’s internal pull-up.

As for the logic analyzer, I’m using a Saleae Logic 8 with a 10 MS/s sampling rate.

Also, just to add, I’m working with the PCA555, which supports 400 kHz.

[TDK]

Include the .SAL capture file with the waveforms you show above here.