Hello @KSmel.1 ,
Thanks for your feedback,
The issue seems to come from a bug found in v6.5.0. We discovered that by mapping SPI3_MISO signal on PB4, JTAG (4 pins) becomes disabled where it shouldn't since JTAG (4 pins) mode does not use SYS_JTRST which can be mapped on PB4 and this latter is related to JTAG (5 pins) mode.
This issue unfortunately affected project migration to v6.5.0 however it is possible to migrate to v6.4.0 or 6.3.0.
To migrate your project to v6.5.0, I would suggest to replace JTAG (4 pins) debug mode with Serial Wire debug mode. To do so you need to open your ioc file with a text editor and you need to delete the following lines:
PB3.GPIOParameters=GPIO_Label
PB3.GPIO_Label=PB3[SWO]
PB3.Locked=true
PB3.Mode=JTAG_4_pins
PB3.Signal=SYS_JTDO-SWO
PA15.GPIOParameters=GPIO_Label
PA15.GPIO_Label=PA15[SYS_JTDI]
PA15.Locked=true
PA15.Mode=JTAG_4_pins
PA15.Signal=SYS_JTDI
By deleting those lines, PB3 and PA15 will get back to their reset state and SYS_JTDO-SWO and SYS_JTD will no longer be used. So only SYS_JTMS-SWDIO and SYS_JTCK-SWCLK signals will be left for debug, these signals represent the serial wire debug mode.
After the delete, you need to save the ioc file and than open it with v6.5.0 to migrate your project.
Mapping SPI3_MISO signal on PC11 would be another option but in your case I think it is not since you are using QUADSPI (Bank2 with Quad SPI lines) and it requires QUADQPI_BK2_NCS signal which can be mapped only on PC11.
With this being said, I submitted an internal ticket to solve this issue. I will keep you posted.
Internal ticket number: 129210 (This is an internal tracking number and is not accessible or usable by customers).
I hope this helps and if you have further question, do not hesitate to get back to me :smiling_face_with_smiling_eyes:
If your issue is solved, please close this post by clicking the "Select as Best" button. This will help other members of the community find this response more quickly :)
Sara.
