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FSMC with NAND interface signalling

Moamen Ayman
Associate III

Hello, I am using STM32L4R9AI (attached the reference manual) with 128GB NAND flash (MT29F128G08CFABBWP-12IT:B TR) (attached its datasheet).

1- This is 8bit NAND flash and according to page 104 in the reference manual the last signal is NWAIT/INT which goes to R/B# according to page 9 in the NAND datasheet, should I connect R/B# from memory to FMC_NWAIT (PD6) or FMC_INT (PG7) ?

2- what are common/attrtibute space timing (in HCLK cycles) for (setup, wait, hold, hi-z) ?

Thanks in advance.

2 REPLIES 2
Jack Peacock_2
Senior III

R/B# is the ready/busy when erasing/writing flash. Since it's a lengthy process you are better off using the interrupt request. That way you get back the erase/write time for another task instead of halting the FMC in a wait state.

Some of the older eval boards use parallel NAND. They can provide examples for configuration.

Jack Peacock

so you suggest connecting R/B# to PG7 ?