2024-09-17 11:55 PM - edited 2024-09-18 01:51 AM
Hello,
my problem, that uIP-Stack has TCP-Retransmissions with HTTP-trafic. That was observed with Wireshark. The same uIP-Stack works at STM32F7 properly. I'm not sure about Settings in CubeMX with Descriptor Address and Size. My settings are like follows:
with this setting I have followed Error inside uVision5 (compiler version 5):
Could someone explain how to set Descriptors inside CubeMX properly and get Ethernet work reliable for HTTP trafic?
Solved! Go to Solution.
2024-09-19 05:01 AM
It's better to align descriptors and buffers at cache line size which is 32 bytes.
2024-09-18 07:09 AM - edited 2024-09-18 07:10 AM
Hello @Wlad777 and welcome to the community,
I'm not expert of Ethernet nor the UIP stack, but did you set the correct MPU config for different memory regions used by the stack (heap and descriptors in case of LWIP) as described in this article / especially the section Cortex-M7 configuration?
2024-09-18 07:20 AM
Why these weird addresses? where have you took this from ?
2024-09-18 10:41 PM - edited 2024-09-18 11:48 PM
thanks for responses.
2024-09-18 10:53 PM
hello @Pavel A. , it was simply guessed based on size of structs ETH_TxDescListTypeDef and ETH_RxDescListTypeDef found in project. Currently I have changed it to attached screenshot setting and error is gone but the link stability is not the best (same like before). Now I change "RX Descriptor Length" and observe the Improvement but there is non improvements.
2024-09-18 11:00 PM
The error message looks like an alignment problem, so you could give some variables the "align 4" attribute, however that works with your compiler.
And check the datasheet for the correct internal SRAM address space for descriptors and buffers.
And, as always: just don't trust that Cube is doing things 100% right.
2024-09-18 11:56 PM
Hello @SofLit , maybe I should activate such MPU config for Descriptors region at STM32H743. I try it out.
2024-09-19 12:17 AM - edited 2024-09-19 04:02 AM
activation of MPU (for Descriptors region) leads to no improvement.
2024-09-19 05:01 AM
It's better to align descriptors and buffers at cache line size which is 32 bytes.
2024-09-19 07:19 AM
Ah, the cache, the unknown beast to me...