CubeMX 6.13.0 and MCU Package H7 v1.12.0 produce incorrect PCLK frequencies

[djanovy]

I updated to CubeMX 6.13.0 and firmware package 1.12.0 for and STM32H755BIT chip and found several issues with the new release:

1. Where is it documented that the new ExitRun0Mode() requires 'USE_PWR_LDO_SUPPLY" to be defined if I want to use that mode?  Shouldn't it be defined by CubeMX when the power parameters are selected in the RCC section?
2. If I am using the Voltage regulator in the LDO supply mode (see RM0399, p 274, Fig. 22, Section 1), what is the purpose of defining SMPS in line 217 of stm32h755xx.h?  In line 440 of system_stm32h7xx_dualcore_boot_cm4_cm7.c the define of SMPS is used to disable the SMPS - shouldn't the define be used to enable the SMPS?
3. Worst issue:  The clock rates returned from PCLK function calls shown below are now showing 240 MHz!  This has messed up the USARTs and all the timers. I thought the MAX clock rate for the PCLK clocks were 120 MHz (see DS12919, p. 110, Table 23, fPCLK, at VOS0 setting).

HAL_RCC_GetPCLK1Freq();
HAL_RCC_GetPCLK2Freq();

Screen capture showing 240 MHz clock rate on PCLK:

[Ghofrane GSOURI]

Hello @djanovy 

First let me thank you for posting.

Could you please share your IOC in order to check your configuration? This will help further the investigation.

THX

Ghofrane

[Ghofrane GSOURI]

Hello @djanovy 

When configuring the Supply Source to :Power _LDO_Supply

The generated code using CubeMX 6.13.0 will be : 

void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

  /** Supply configuration update enable
  */
  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);

calling HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); prepares your microcontroller to use the LDO for power management. When ExitRun0Mode() is subsequently executed, it will configure the system to ensure that the LDO is enabled and ready, allowing for a smooth transition back to normal operational mode from a low-power state.

So no need for you to add anything.

I am looking forward to receiving your feedback and IOC.

THX

Ghofrane

[djanovy]

Version 6.12 and 6.13 .ioc files attached.  I'm also sending the main.c files and the simple post.c file that showed the PCLK frequencies at 240 MHz.  The main.com in this message is for the CM7 core.  This web interface only allows three files at a time, so I will include the other two files in the next message.

The first indicator that I noticed in my real application was the USART output data on the CM7 core was corrupted indicating an incorrect baud rate.

In the main.c files I have commented out the code where the two cores coordinate their boot sequence, allowing them to boot independently.  CTI option bytes are also set in the OpenOCD target config to prevent the cores from halting each other.

Let me know if there is anything else I can provide.

[djanovy]

Main.c for the CM4 core and the post.c file that include the HAL_RCC_GetPCLKxFreq() functions.

The two .ioc files are simple configurations that enable two USARTs (1 & 6) and were created from scratch to verify the clock frequency issue.

[djanovy]

Just to clarify the sequence of function calls...

ExitRun0Mode() is called in startup_stm32h755xx_CM7.s, line 64:

/* Call the ExitRun0Mode function to configure the power supply */
  bl  ExitRun0Mode
/* Call the clock system initialization function.*/
  bl  SystemInit

before HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY) is called from main() -> SystemClock_Config():

void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

  /** Supply configuration update enable
  */
  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);

ExitRun0Mode() from system_stm32h7xx_dualcore_boot_cm4_cm7.c checks for a define 'USE_PWR_LDO_SUPPLY'.  I do not see where this define gets set in any of the source code/header files.

void ExitRun0Mode(void)
{
#if defined(USE_PWR_LDO_SUPPLY)
  #if defined(SMPS)
    /* Exit Run* mode by disabling SMPS and enabling LDO */
    PWR->CR3 = (PWR->CR3 & ~PWR_CR3_SMPSEN) | PWR_CR3_LDOEN;
  #else
    /* Enable LDO mode */
    PWR->CR3 |= PWR_CR3_LDOEN;
  #endif /* SMPS */

[djanovy]

I found the 'USE_PWR_LDO_SUPPLY' define in the Makefile.  Since I don't use the CubeMX generated Makefile, I wasn't finding it.  For people in a similar situation it would help if there was an warning error if a specific supply mode is not selected similar to how CORE_CM7 is checked:

#if defined(DUAL_CORE) && !defined(CORE_CM4) && !defined(CORE_CM7)
 #error "Dual core device, please select CORE_CM4 or CORE_CM7"
#endif

I had previously added the define to my Symbol list and the testing done above included the define.

[cvanbeek]

I have a related problem but in a CMake project for STM32H7B3LIHxQ.  This project has SupplySource set to PWR_DIRECT_SMPS_SUPPLY in the RCC settings.  When generating the code, it defines BOTH USE_PWR_LDO_SUPPLY and USE_PWR_DIRECT_SMPS_SUPPLY in the CMakeLists.txt file.

[cvanbeek]

Here's a minimum example project with my replicated issue.  Note the definitions in cmake/stm32cubemx/CMakeLists.txt

[djanovy]

How the power supply is configured depends on the circuit layout (how your device powered), the clock frequency you are running at, the VOS level, and other items.  See your reference manual, RM0455, Section 6, p. 260, for full details.  Figure 20 on page 266 shows the allowed configurations.

What problem are you seeing?