TIM2 as a sequencer for TIM5, TIM1 and TIM8

[RChap.1]

Part: STM32L4R5ZIT6

I would like to use TIM2 to increment 3 other timers at different times:

TIM2 is incrementing from an external clock and rolling over at a set period.

1. TIM2 rollover would increment TIM5

2. TIM2 Compare 1 would increment TIM1

3. TIM2 Compare 2 would increment TIM8

TIM5 would increment at time 0 of every period. TIM1 would increment at t1 of every period. TIM8 would increment  at t2 of every period.

Is this even possible? Thanks.

[AScha.3]

Try to set it in Cube , as you want it, then you know.

[RChap.1]

I have tried every possible combination in Cube and everything always happens at the same time, the rollover point. All three counters increment at the same time. One useful trick I did find out was to pause the debugger which stops the main program. In my test setup, the main program does nothing so this is no loss. The bonus is that the timers all still run and you can change values in the Timer registers to try out different scenarios.

So I've tried all the ones there and all the ones in Cube but always the same result, all counters increment at the same time.

One of the problems working with internal peripherals is visibility. The IDE is awkward to view a bunch of different things at the same time to see what is changing. Instead I use some extra channels on the timers to output PWM waveforms that I can monitor on a multi input scope. This way I can change the registers in the timers and see the results instantly on the scope.

So I've learned a lot but I have not succeeded.

If I can't get staggered triggers to work, I am thinking maybe I can use a couple of DMA channels to achieve the same effect. But! How do I get a DMA transfer to trigger a timer so that it increments? No software, just hardware.

[RChap.1]

I connected unused channels from each timer to see it operation visibly. The compare 3 and 4 have the same values that compare1 and compare2 have for TIM2. The ARR match and counter rollover should be what triggers TIM5. By looking at the waveforms for when the three connected timers (TIM1, TIM5, TIM8), we can see that they all change at the same time as the leading edge of TIM2 output channels. It seems that all the counters are driven by the overflow and the compares do nothing. Compare 1 falling edge is when the compare 1 matches the CNT and this is when TIM1 should increment. Compare 2 falling edge is when TIM8 should increment.

This is a block diagram of the design:

[AScha.3]

>everything always happens at the same time

Right, (i tried now also...), because you just can choose one event as trg out , so this will trigger all, that uses this signal at same time. Ok, so you can use it, to start TIM5 from TIM2 UE (ARR rollover).

Then we need 2 compare outputs from TIM2 , set them to output on pin .

And connect TIM1 + TIM8 -> Tx_ED  to the CC-outputs from TIM2 , 2 x external connection.

Now TIM2 triggers TIM5 by internal TRG signal, TIM1 + TIM8 triggered by the connected CC-outputs from TIM2 .

( Maybe you have to invert the CC outputs, if trigger is fix on rising edge. CH polarity ... )

Try...

[RChap.1 · Accepted solution]

Thankyou for your insights and patience. I managed to get what I wanted. The two external connections were the key: 

My configuration is different as I'm using ETR with trigger polarity inverted: