STM32G431 FDCAN Why ir ARA (acces to reserved address) is firing after enabling FDCAN1 clock?

[KJona.2]

Hi,

I am developing a device which uses CAN interface. My code is 'bare metal'. I am using arm-none-eabi combined with cmake and vscode. Assembly and CMSIS are taken from cube generated project.

The problem is that immediatly after setting RCC_APB1ENR1_FDCANEN bit the FDCAN_IR_ARA bit is set by hardware. The code is very simple:

void main()

{

  RCC->CCIPR &= ~RCC_CCIPR_FDCANSEL;

  RCC->CCIPR |= RCC_CCIPR_FDCANSEL_1;

  RCC->APB1ENR1 |= RCC_APB1ENR1_FDCANEN;

  FDCAN1->CCCR |= FDCAN_CCCR_INIT;

//here the FDCAN1->IR ARA bit is setted

  while ((FDCAN1->CCCR & FDCAN_CCCR_INIT) != FDCAN_CCCR_INIT)

    ;

  FDCAN1->CCCR |= FDCAN_CCCR_CCE;

  FDCAN1->CCCR |= FDCAN_CCCR_DAR;

  FDCAN1->CCCR |= FDCAN_CCCR_PXHD; // Protocol exception handling

  FDCAN1->NBTP = 0x100403;

}

I was not able to reproduce this error in STM32CubeIDE. I've pasted same lines to the empty project and it worked. Therefore i must by not doing something that CubeIDE is. I read through HAL library for FDCAN and I am pretty sure that this code should work.

Any ideas?

[FBL]

Hello @KJona.2​,

Probably, it may be helpful to review the clock configuration for the FDCAN peripheral to ensure that it is correctly configured and that the appropriate clock signals are being sent to the peripheral.

[KJona.2]

Hi,

I'am still trying to solve the issue. Could you please specify on which values i should pay special attention?

I can not see any difference between STM32 IDE code and mine. All clock values related to FDCAN are the same.

The problem is that code below work in STM32 IDE and don't work using other environment.

#include "stm32g431xx.h"
int main()
{
  RCC->CCIPR &= ~RCC_CCIPR_FDCANSEL;
 
  RCC->CCIPR |= RCC_CCIPR_FDCANSEL_1;
 
  RCC->APB1ENR1 |= RCC_APB1ENR1_FDCANEN;
  while(1);
}

[LCE]

Maybe you must select a clock source first for the CAN peripheral ?

(I don't know the G4's CAN)

In the HAL CAN example - I think - there is also some forced CAN peripheral reset.

[KJona.2]

Line 4 and 6 of mentioned snippet are setting FDCAN clock source to PCLK. I've also tested PLL and HSE as clock source. Still same behaviour. Am I missing something?

The code snippet in my previous reply is working when I compile it with STM32 IDE. Not working when I compile it using same assembly and toolchain but using cmake ank make.

[KJona.2]

Hi,

I have done more investigation... After following steps:

1. I've build CUBE generated project in VSCode using makefile
2. I've uploaded this code using OpenOCD. I found out that the programmer does not matter. Behavior is the same when using STMCubeProgrammer.

Than I found out 2 things:

1. If i reset the MCU and attach debugger in CubeIDE the bit is not set.
2. If i attach VSCode debugger the bit is set. Than after attaching from Cube the bit is still set.

The behavior is the same when using OpenOCD or STLINK GDB.

So... Everything is working untill I attach to running program or start debuging using vscode and cortex -debug...

[KJona.2 · Accepted solution]

I found out that the issue is related to cortex-debug addon to VSCode. I don't have any further ideas to investigate it more.