2020-07-31 02:01 PM
Hi
My project was ok before, on 1.2.0 package version and CubeIDE 1.3.0. After migrating ADC 2,3,4,5 dont work (STM32G474QE). Im use LL and CMSIS
In my project i have ADC with DMA and triggered ADC1 &ADC5 from the same HR Master timer
What is strange that interrupt from DMA related to ADC5 is coming but no data is in the buffer. In ADC1 everything is ok.
To be sure I have also deleated almost all unrelated things and only leaved ADC5, DMA and HRTIMER. The same thing happens.
Is there a way to go back to 1.2.0 package version and cube ide1.2.0 with existing project or i have to do it manually ? Or mayby wait for update?
UPDATE: With HAL on ADC5 it works. Is there something wrong with my code in LL and CMSIS ADC&DMA startup (and if yes, why ADC1 on LL&CMSIS works) ?
//ADC5
ADC5->CR &= ~ADC_CR_ADEN; // ensure ADC is off
ADC5->CR &= ~ADC_CR_ADCALDIF; //single mode for calibration
ADC5 ->CR |= ADC_CR_ADCAL; //start the calibration of the ADC5
while (ADC5 ->CR & ADC_CR_ADCAL){} //wait until calibration done
ADC5->CR |=ADC_CR_ADEN; //enable ADC5
while(!(ADC5->ISR & ADC_ISR_ADRDY)); // wait until ADC is ready
// DMA1 CHANNEL 5
DMA1_Channel5->CPAR = (uint32_t)(&(ADC5->DR)); // peripheral (source) address
DMA1_Channel5->CMAR = (uint32_t)&ADC5_TABLE; //MEMORY ADDRESS
DMA1_Channel5->CNDTR = ( uint16_t )ADC5_DATA_SIZE; //TRANSFER SIZE
DMA1_Channel5->CCR |= DMA_CCR_TCIE; //ENABLE TRANSFER COMPLETE INTERRUPT
DMA1_Channel5->CCR |= ( DMA_CCR_EN ); //CHANNEL ENABLE
ADC5->CR |=ADC_CR_ADSTART;
2020-08-02 02:06 PM
Solved: Cube in MX_ADC5_init assigned ADC1 to these functions
/* Disable ADC deep power down (enabled by default after reset state) */
LL_ADC_DisableDeepPowerDown(ADC1);
/* Enable ADC internal voltage regulator */
LL_ADC_EnableInternalRegulator(ADC1);