Count external pulses

[peterka]

I want to count external pulses for one second.

On STM32F030 / HAL-Lib I did not find

• atomic read/reset counter
• capture by a second timer did not work, thoug I studied well and tested a lot how to config it by STM32CubeIDE

Is there any example for a highly accurate count of external pulses by a tim (timers/capture/compare/pwm)?

Thanx, Peter

[waclawek.jan]

In STM32 timers, what you'd refer to as under/overrun, is called Update.

 

Didn't you say that you are using 'F030?

JW

[waclawek.jan]

> But triggering capture by a second timer and generating interrupt on capture did not work

Read out and check/post content of both timers' registers.

JW

[peterka]

For my tests I am using stm32l412kb because I have an eval board with it here. But I want to use stm32f030 in my final design.

UDIS is not a harware-driven flag to indicate over(under)run. Quote from Page 780 of RM0394 Rev 4 :

" Bit1 UDIS: Update disable

This bit is set and cleared by software to enable/disable UEV event generation.

0: UEV enabled. The Update (UEV) event is generated by one of the following events:

• – Counter overflow/underflow
• – Setting the UG bit
• – Update generation through the slave mode controller

Buffered registers are then loaded with their preload values.

1: UEV disabled. The Update event is not generated, shadow registers keep their value

(ARR, PSC, CCRx). However the counter and the prescaler are reinitialized if the UG bit is set or if a hardware reset is received from the slave mode controller. "

Thanx, Peter

[peterka]

I use stm32l412kb because I have an eval board with it, but I want to unse stm32f030 in my final design.

Quote from page 780 of RM0394:

" Bit1 UDIS: Update disable

This bit is set and cleared by software to enable/disable UEV event generation.

0: UEV enabled. The Update (UEV) event is generated by one of the following events:

• – Counter overflow/underflow
• – Setting the UG bit
• – Update generation through the slave mode controller

Buffered registers are then loaded with their preload values.

1: UEV disabled. The Update event is not generated, shadow registers keep their value

(ARR, PSC, CCRx). However the counter and the prescaler are reinitialized if the UG bit is set or if a hardware reset is received from the slave mode controller.

"

[waclawek.jan]

> UDIS is not a harware-driven flag to indicate over(under)run.

I never said that.

I said, that what you've call under/overrun, is in STM32 called Update. And then read the TIM chapter in RM to find all the references to the Update event, including the flag indicating its occurence in TIMx_SR, and the flag enabling interrupt upon it in TIMx_DIER.

Just read that chapter.

JW

[peterka]

Hi JW,

thanx to Your Schnitzeljagd-Hints I was able to implement an interrupt on counter-overrun / update event (htim_count) and count almost precisely fom 0 to 130000 pulses within 1 second. The second timer (htim_int) interrupts each second and then calculates the counts.

​void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){

   if (htim == &htim_count)

      htim_count_temp++; // count overrun

   if (htim == &htim_int) // each second

{

      htim_count_result = (htim_count_temp * (uint32_t)65536) + __HAL_TIM_GET_COUNTER(&htim_count);

      __HAL_TIM_SET_COUNTER(&htim_count, 0);

      htim_count_temp = 0;

   }

}