Unable get interrupts to Cortex A7_1 in STM32MP157

[Srikanth1]

hello

We are using STM32MP157A-dk1 evaluation board. To this we are writing bare metal code in SEGGER Embedded Studio.

Actually, We have enabled group and set enable registers for respected SGI and PPI interrupts in GICC and GICD registers. By this we are able to generate SGI and PPI interrupts for cortex A_0 but unable to generate for cortex A_1. what might be the issue ?

regards

srikanth

[Erwan SZYMANSKI]

Hello @Srikanth​,

GICC and GICD registers configuration is not an easy task, and a little error in this last one can bring some usage troubles.

Could you please share a complete dump of your GICC and GICD registers that can help us to understand what is going wrong ?

Kind regards,

Erwan.

[PatrickF · Accepted solution]

Hi @Srikanth​ 

Don't know if it help, but please note that, inside the GIC, there is a single 'Distributor', i.e. GICD registers which is are shared with both cores.

But each core has its own 'CPU interface', i.e. each core see their own GICC registers, so you cannot configure core1 interrupts from core0 (don't know if it is what you are trying to do).

Only core1 could enable its own interrupts inside GICC.

Regards.

[Srikanth1]

Thank you for reply @Erwan SZYMANSKI​ 

Now we are getting all interrupts in both cores.

[Srikanth1]

Thank you for reply @PatrickF​ 

Now we are getting all interrupts in both cores and also one core to another core.

[PatrickF]

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