I think this one might be very easy. It's just a configuration I need to set, but I don't know what configuration I need to write.
We can begin with the error log. The error is about the clock for the MPU. It as not been set yet and I don't know why.
D/TC:0 0 get_opp_freqvolt_from_dt_subnode:1426 Invalid opp-supported-hw 0x2
D/TC:0 0 get_opp_freqvolt_from_dt_subnode:1426 Invalid opp-supported-hw 0x2
D/TC:0 0 stm32_cpu_opp_is_supported:558 Not supported opp-supported-hw 0x2
D/TC:0 0 stm32_cpu_opp_is_supported:558 Not supported opp-supported-hw 0x2
D/TC:0 0 stm32_cpu_opp_is_supported:558 Not supported opp-supported-hw 0x2
D/TC:0 0 stm32_cpu_opp_get_dt_subnode:623 Found OPP 0 (650000kHz/1200mV) from DT
D/TC:0 0 stm32_cpu_opp_is_supported:558 Not supported opp-supported-hw 0x2
D/TC:0 0 set_voltage_then_clock:151 opp = 0, cpu_opp.dvfs[opp].volt_mv = 1200
D/TC:0 0 _set_opp_clk_rate:92 opp = 0, cpu_opp.dvfs[opp].freq_khz = 650000
D/TC:0 0 stm32mp1_set_opp_khz:3856 freq_khz = 650000
D/TC:0 0 stm32mp1_set_opp_khz:3873 (mpu_src != RCC_MPCKSELR_PLL) && (mpu_src != RCC_MPCKSELR_PLL_MPUDIV) = 1
D/TC:0 0 stm32mp1_set_opp_khz:3876 TEE ERROR BAD STATE
D/TC:0 0 set_voltage_then_clock:164 cpu_opp.current_opp = 0
E/TC:0 0 set_voltage_then_clock:165 Failed to set clock
E/TC:0 0 probe_driver_node:458 Failed to probe stm32-cpu-opp on node cpu0-opp-table: 0xffff0000
D/TC:0 0 process_probe_list:590 Unresolved dependencies after 5 rounds, 5 deferred
.......
......
.....
....
...
..
.
E/TC:0 0 probe_dt_drivers:795 Probe sequence result: 0
D/TC:0 0 print_probe_list:397 Probe list: 0 elements
D/TC:0 0 print_probe_list:403 `- Probe list end
D/TC:0 0 print_probe_list:409 Failed list: 1 elements
E/TC:0 0 print_probe_list:411 |- Driver stm32-cpu-opp on node cpu0-opp-table failed
D/TC:0 0 print_probe_list:414 `- Failed list end
E/TC:0 0 Panic at core/kernel/dt_driver.c:797 <probe_dt_drivers>
The error log showing that it could find the OPP configuration for STM32MP151AAC3 processor. Here is a snippet from STM32MP151.dtsi from Op-tee.
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a7";
clock-frequency = <650000000>;
device_type = "cpu";
reg = <0>;
clocks = <&rcc CK_MPU>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
nvmem-cells = <&part_number_otp>;
nvmem-cell-names = "part_number";
};
};
arm-pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>;
interrupt-parent = <&intc>;
};
cpu0_opp_table: cpu0-opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1200000>;
opp-supported-hw = <0x2>;
opp-suspend;
};
opp-650000000 {
opp-hz = /bits/ 64 <650000000>;
opp-microvolt = <1200000>;
opp-supported-hw = <0x1>;
st,opp-default;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1350000>;
opp-supported-hw = <0x2>;
st,opp-default;
};
};View more
I did put some DMSG messages in the .c code. The error appear at line 56 in this code. It giving me the return TEE_ERROR_BAD STATE. That means that the PLL1 clock is not set for the MPU...I guess.
static TEE_Result set_voltage_then_clock(unsigned int opp)
{
TEE_Result res = TEE_ERROR_GENERIC;
DMSG("opp = %i, cpu_opp.dvfs[opp].volt_mv = %i", opp, cpu_opp.dvfs[opp].volt_mv);
res = opp_set_voltage(cpu_opp.rdev, cpu_opp.dvfs[opp].volt_mv);
if (res)
return res;
#ifdef CFG_STM32MP13
if (cpu_opp.dvfs[opp].volt_mv > MPU_RAM_LOW_SPEED_THRESHOLD)
io_clrbits32(stm32_pwr_base(), PWR_CR1_MPU_RAM_LOW_SPEED);
#endif
if (_set_opp_clk_rate(opp)) {
unsigned int current_opp = cpu_opp.current_opp;
unsigned int previous_volt = 0U;
DMSG("cpu_opp.current_opp = %i", current_opp);
EMSG("Failed to set clock");
...
...
...
...
}
static TEE_Result _set_opp_clk_rate(unsigned int opp)
{
#ifdef CFG_STM32MP15
DMSG("opp = %i, cpu_opp.dvfs[opp].freq_khz = %i", opp, cpu_opp.dvfs[opp].freq_khz);
return stm32mp1_set_opp_khz(cpu_opp.dvfs[opp].freq_khz);
#else
return clk_set_rate(cpu_opp.clock, cpu_opp.dvfs[opp].freq_khz * 1000UL);
#endif
}
TEE_Result stm32mp1_set_opp_khz(uint32_t freq_khz)
{
uint32_t mpu_src=0;
DMSG("freq_khz = %i", freq_khz);
if (freq_khz == current_opp_khz)
return TEE_SUCCESS;
if (!stm32mp1_clk_pll1_settings_are_valid()) {
/*
* No OPP table in DT or an error occurred during PLL1
* settings computation, system can only work on current
* operating point so return error.
*/
DMSG("PLL1 settings are valid! OK!");
return TEE_ERROR_NO_DATA;
}
/* Check that PLL1 is MPU clock source */
mpu_src=io_read32(stm32_rcc_base() + RCC_MPCKSELR) &
RCC_SELR_SRC_MASK;
DMSG("(mpu_src != RCC_MPCKSELR_PLL) && (mpu_src != RCC_MPCKSELR_PLL_MPUDIV) = %i ", (mpu_src != RCC_MPCKSELR_PLL) && (mpu_src != RCC_MPCKSELR_PLL_MPUDIV));
if ((mpu_src != RCC_MPCKSELR_PLL) &&
(mpu_src != RCC_MPCKSELR_PLL_MPUDIV)){
DMSG("TEE ERROR BAD STATE");
return TEE_ERROR_BAD_STATE;
}
if (pll1_config_from_opp_khz(freq_khz)) {
/* Restore original value */
if (pll1_config_from_opp_khz(current_opp_khz)) {
EMSG("No CPU operating point can be set");
panic();
}
DMSG("pll1_config_from_opp_khz = TEE ERROR GENERIC");
return TEE_ERROR_GENERIC;
}
current_opp_khz = freq_khz;
DMSG("TEE_SUCCESS: current_opp_khz = %i", current_opp_khz);
return TEE_SUCCESS;
}View more
Question:
How can I configure so PLL1 is the MPU clock source? It seems that my STM32CubeIDE 1.16.0 did not add the clock source so I did it by myself. Still, the error remains.
st,clksrc=<
CLK_MPU_PLL1P /* <-- Manually added */
CLK_CKPER_DISABLED
CLK_ETH_PLL4P
CLK_SDMMC12_PLL4P
CLK_STGEN_HSE
CLK_SPI2S23_PLL3Q
CLK_I2C46_HSI
CLK_USBO_USBPHY
CLK_CEC_LSE
CLK_I2C12_HSI
CLK_UART24_HSI
CLK_MPU_HSI
CLK_AXI_PLL2P
CLK_MCU_PLL3P
CLK_RTC_LSE
CLK_MCO1_DISABLED
CLK_MCO2_DISABLED
>;
st,clkdiv = <
DIV(DIV_MPU, 1)
DIV(DIV_AXI, 0)
DIV(DIV_MCU, 0)
DIV(DIV_APB1, 1)
DIV(DIV_APB2, 1)
DIV(DIV_APB3, 1)
DIV(DIV_APB4, 1)
DIV(DIV_APB5, 2)
DIV(DIV_RTC, 0)
DIV(DIV_MCO1, 0)
DIV(DIV_MCO2, 0)
>;View more
The STM32-Computer-Firmware is using STM32MP151AAC3 processor. As you can see, the HSI clock is the clock of the MPU and that's the cause of the error.
This one is made with default settings when I first created a empty project with STM32MP157D-DK1 board. Here the PLL1 lock is the clock of the MPU.
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