2025-03-07 4:14 AM
Hi,
i have a question to the memory-controller and the supported memory-size.
I'm using the Part STM32MP157CAAx (Package: LFBGA448).
In the Datasheet (STM32MP157C/F) and AN5031 there is a definition to the supported SDRAM size.
For package "LFBGA448" the SDRAM is defined as following.
- DDR3/3L (16bits 533MHz) up to 1Gbyte., single rank.
My Questions:
a.) Does the Memory-Controller support a DDR3L (Configuration 512Meg x 16) with "Single-rank and Twin-Die?
b.) Does the Memory-Controller support the following Page sizes:
- Page-Size= 2KB
- Page-Size= 1KB (Page size per die)
Could you please give us support, to answer the questions.
Thank you.
Reguards
2025-03-10 9:01 AM
Hello @Fritz2 ,
According to DDR experts, there is no blocker to use a 1GB twin-die DDR3. No specific balling and internal ZQ connected to GND for the second die.
Concerning page sizes, the standard is 2K that switches into 1K for twin-die, but it should be transparent.
Do not hesitate to check the list of DDR validated on our side: https://wiki.st.com/stm32mpu/wiki/Validated_DRAM_on_STM32_MPU_portfolio
Kind regards,
Erwan.
2025-03-11 2:08 AM
Hello Erwan SZYMANSKY,
thank you for the answer with a good and usefull information.
I have an additional question.
I think some configuration registers (SMT32CubeMX / DDRCTRL / DDRPHYC) ) must be set when using the MPU (STM32MP157CAAx) with 1GB twin-die DDR3.
I have read the AppNote AN5168 (How to configure DDR on STM32MP1 MPUs), but i can not find some informations how to setup a "twin-die DDR3".
Could you please help us with some support, to answer the questions.
Thank you.
Kind reguards,
Fritz