2025-03-25 4:56 PM
Hello,
I am trying to interface the STM32MP157 to a dual die NAND. I have found this previous post: https://community.st.com/t5/stm32-mpus-embedded-software-and/interfacing-fmc-with-multiple-chip-selects-on-a-single-nand/m-p/301979 and I can see Linux correctly detects the NAND:
[ 1.482407] stm32_fmc2_nfc 80000000.nand-controller: nand->ncs = 0x8
[ 1.482447] stm32_fmc2_nfc 80000000.nand-controller: nfc->cs_assigned = 0x3
[ 1.484296] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xd3
[ 1.484322] nand: AMD/Spansion S34ML16G2
[ 1.484332] nand: 2048 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 128
[ 1.484371] nand: 2 chips detected
[ 1.484457] Scanning device for bad blocks
However when I run `ubiformat`, `flash_erase` or `mtdinfo`, the NAND is detected 4GiB instead of 2GiB:
root@device:/root# mtdinfo /dev/mtd13
mtd13
Name: 80000000.nand-controller
Type: nand
Eraseblock size: 131072 bytes, 128.0 KiB
Amount of eraseblocks: 32768 (4294967296 bytes, 4.0 GiB)
Minimum input/output unit size: 2048 bytes
Sub-page size: 2048 bytes
OOB size: 128 bytes
Character device major/minor: 90:26
Bad blocks are allowed: true
Device is writable: true
Devicetree for reference:
&fmc{
pinctrl-names = "default", "sleep";
pinctrl-0 = <&fmc_pins_mx>;
pinctrl-1 = <&fmc_sleep_pins_mx>;
status = "disabled";
/* USER CODE BEGIN fmc */
nand-controller@4,0 {
status = "okay";
nand@0 {
reg = <0 1>;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
#address-cells = <1>;
#size-cells = <1>;
};
};
/* USER CODE END fmc */
};
This is causing any ubifs operations to fail because it rereads a PEB which contains a duplicated LEB and causes the ubifs operation to fail.
Any advice would be greatly appreciated.
Thanks!