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Op-tee Debug message: print_probe_list:409 Failed list: 0 elements

DMårt
Lead

It's fun to debugging the output when I flashing the processor/eMMC from CubeProgrammer via USB. But it's less fun to not knowing the cause of the error.

What can it be in this case?

Do I have forgot the sett the board ID, is the unknown VDD the error?

What I have done, is to copy the most of stm32mp15xx-dk1.dtsi into stm32mp15x-<your project device tree>-mx.dts because my custom made bord is the same as STM32MP157D-DK1 + eMMC boot. 

 

See the post here: Debug Output UART
My device tree .dts files: Device Tree STM32MP151AAC3 

 

 

 

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-Computer
5 REPLIES 5
Erwan SZYMANSKI
ST Employee

Hello @DMårt ,
Sorry but I cannot access your logs, can you put it here ?
Concerning the log you put in title, this is not an error log. It just says that the number of Failed probed item is 0.

I will need the info of your first link to go deeper.

Can you also precise me your software version ? 

Kind regards,
Erwan.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Hello @Erwan SZYMANSKI 

I upload the log here as a text file: https://easyupload.io/ykdhui

 

Yes. I can give you the whole software: https://github.com/DanielMartensson/STM32-Computer/tree/main/Firmware/STM32-Computer-Firmware

 

I'm running CubeIDE 1.16.0 version with latest SDK and Sources. 

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-Computer

@DMårt ,
I see PMIC configuration under I2C4 node in your TF-A DTS and no PMIC configuration in OP-TEE device tree. Moreover I see TF-A logs showing PMIC version so I guess your PCB is not power discrete. Please align the different information between your component device trees.

Kind regards,
Erwan.

 

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Hello @Erwan SZYMANSKI 

Yes. By adding the PMIC for the Op-Tee, I get a different result.

"assertion 'info.reg != DT_INFO_INVALID_REG && info.reg_size != DT_INFO_INVALID_REG_SIZE' failed at core/drivers/stm32_uart.c:156 <stm32_uart_init_from_dt_node>" - What does this mean?

 

 

I/TC: OP-TEE version: 8e92eeff0-dev (gcc version 12.3.0 (GCC)) #9 Thu Aug  8 17:16:17 UTC 2024 arm
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
D/TC:0 0 call_preinitcalls:21 level 2 mobj_mapped_shm_init()
D/TC:0 0 mobj_mapped_shm_init:463 Shared memory address range: dbc00000, ddc00000
D/TC:0 0 call_initcalls:40 level 1 register_time_source()
D/TC:0 0 call_initcalls:40 level 1 initialize_bsec()
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[1] = cfg0_otp 0bit offset: 0, length: 8
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[2] = part_number_otp 1bit offset: 0, length: 8
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[3] = monotonic_otp 4bit offset: 0, length: 32
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[4] = nand_otp 9bit offset: 0, length: 32
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[5] = uid_otp 13bit offset: 0, length: 96
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[6] = package_otp 16bit offset: 0, length: 32
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[7] = hw2_otp 18bit offset: 0, length: 32
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[8] = calib 23bit offset: 0, length: 16
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[9] = calib 23bit offset: 16, length: 16
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[10] = pkh_otp 24bit offset: 0, length: 256
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[11] = mac 57bit offset: 0, length: 64
D/TC:0 0 save_dt_nvmem_layout:875 nvmem[12] = huk-otp 60bit offset: 0, length: 128
D/TC:0 0 call_initcalls:40 level 1 clk_dt_probe()
D/TC:0 0 clk_dt_probe:202 Probing clocks from devicetree
D/TC:0 0 clk_register:126 Registered clock clk-hse, freq 24000000
D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-hse initialized
D/TC:0 0 clk_register:126 Registered clock clk-hsi, freq 64000000
D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-hsi initialized
D/TC:0 0 clk_register:126 Registered clock clk-lse, freq 32768
D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-lse initialized
D/TC:0 0 clk_register:126 Registered clock clk-lsi, freq 32000
D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-lsi initialized
D/TC:0 0 clk_register:126 Registered clock clk-csi, freq 4000000
D/TC:0 0 probe_driver_node:443 element: fixed_clock on node clk-csi initialized
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock (null), freq 533000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 533000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:126 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:126 Registered clock spi6, freq 66625000
D/TC:0 0 clk_register:126 Registered clock i2c4, freq 64000000
D/TC:0 0 clk_register:126 Registered clock i2c6, freq 64000000
D/TC:0 0 clk_register:126 Registered clock usart1, freq 66625000
D/TC:0 0 clk_register:126 Registered clock rtcapb, freq 66625000
D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:126 Registered clock iwdg, freq 66625000
D/TC:0 0 clk_register:126 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:126 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:126 Registered clock gpioz, freq 266500000
D/TC:0 0 clk_register:126 Registered clock crpy1, freq 266500000
D/TC:0 0 clk_register:126 Registered clock hash1, freq 266500000
D/TC:0 0 clk_register:126 Registered clock rng1, freq 4000000
D/TC:0 0 clk_register:126 Registered clock bkpsram, freq 266500000
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock rtc, freq 32768
D/TC:0 0 clk_register:126 Registered clock gpioa, freq 0
D/TC:0 0 clk_register:126 Registered clock gpiob, freq 0
D/TC:0 0 clk_register:126 Registered clock gpioc, freq 0
D/TC:0 0 clk_register:126 Registered clock gpiod, freq 0
D/TC:0 0 clk_register:126 Registered clock gpioe, freq 0
D/TC:0 0 clk_register:126 Registered clock gpiof, freq 0
D/TC:0 0 clk_register:126 Registered clock gpiog, freq 0
D/TC:0 0 clk_register:126 Registered clock gpioh, freq 0
D/TC:0 0 clk_register:126 Registered clock gpioi, freq 0
D/TC:0 0 clk_register:126 Registered clock gpioj, freq 0
D/TC:0 0 clk_register:126 Registered clock gpiok, freq 0
D/TC:0 0 clk_register:126 Registered clock (null), freq 208877928
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 208877928
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock syscfg, freq 0
D/TC:0 0 clk_register:126 Registered clock (null), freq 0
D/TC:0 0 clk_register:126 Registered clock (null), freq 0
D/TC:0 0 clk_register:126 Registered clock dbg, freq 0
D/TC:0 0 clk_register:126 Registered clock hse, freq 24000000
D/TC:0 0 clk_register:126 Registered clock csi, freq 4000000
D/TC:0 0 clk_register:126 Registered clock lsi, freq 32000
D/TC:0 0 clk_register:126 Registered clock lse, freq 32768
D/TC:0 0 clk_register:126 Registered clock hsi, freq 64000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 12000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock pll2q, freq 266500000
D/TC:0 0 clk_register:126 Registered clock pll2r, freq 533000000
D/TC:0 0 clk_register:126 Registered clock (null), freq 208877929
D/TC:0 0 clk_register:126 Registered clock pll3q, freq 24573874
D/TC:0 0 clk_register:126 Registered clock pll3r, freq 11290698
D/TC:0 0 clk_register:126 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:126 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:126 Registered clock mcu, freq 208877929
D/TC:0 0 probe_driver_node:443 element: stm32mp1_clock on node rcc@50000000 initialized
D/TC:0 0 call_initcalls:40 level 2 init_debug()
D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:644 nvmem cfg0_otp = 0: 0 bit offset: 0, length: 8
I/TC: WARNING: All debug access are allowed
D/TC:0 0 call_initcalls:40 level 2 provisioning_probe()
D/TC:0 0 call_initcalls:40 level 2 probe_dt_drivers_early()
D/TC:0 0 add_node_to_probe:641 element: stm32-cpu-opp on node cpu0-opp-table
D/TC:0 0 add_node_to_probe:641 element: simple-bus on node soc
D/TC:0 0 add_node_to_probe:641 element: simple-bus on node ahb
D/TC:0 0 add_node_to_probe:641 element: fixed-regulator on node vin
D/TC:0 0 probe_driver_node:443 element: fixed-regulator on node vin initialized
D/TC:0 0 probe_driver_node:443 element: simple-bus on node ahb initialized
D/TC:0 0 add_node_to_probe:641 element: stm32mp15_rstctrl on node rcc@50000000
D/TC:0 0 add_node_to_probe:641 element: stm32mp1-pwr-regu on node pwr@50001000
D/TC:0 0 add_node_to_probe:641 element: stm32-rtc on node rtc@5c004000
D/TC:0 0 add_node_to_probe:641 element: stm32mp1-tzc400 on node tzc@5c006000
D/TC:0 0 add_node_to_probe:641 element: stm32-tamp on node tamp@5c00a000
D/TC:0 0 add_node_to_probe:641 element: stm32_gpio on node pin-controller@50002000
D/TC:0 0 add_node_to_probe:641 element: stm32_gpio on node pin-controller-z@54004000
D/TC:0 0 add_node_to_probe:641 element: stm32-etzpc on node etzpc@5c007000
D/TC:0 0 probe_driver_node:443 element: simple-bus on node soc initialized
D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 1 time(s)
D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 2 time(s)
D/TC:0 0 stm32_etzpc_set_driverdata:517 ETZPC revision 0x32, per_sec 96, ahb_sec 0, tzma 2
D/TC:0 0 add_node_to_probe:641 element: stm32_i2c on node i2c@5c002000
D/TC:0 0 probe_driver_node:443 element: stm32-etzpc on node etzpc@5c007000 initialized
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@54004000
D/TC:0 0 _fdt_stm32_gpio_controller:982 GPIO bank Z assigned to non-secure
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank Z (8 pins) @d9004000
D/TC:0 0 probe_driver_node:443 element: stm32_gpio on node pin-controller-z@54004000 initialized
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50002000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank A (16 pins) @d9402000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50003000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank B (16 pins) @d9403000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50004000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank C (16 pins) @d9404000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50005000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank D (16 pins) @d9405000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50006000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank E (16 pins) @d9406000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50007000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank F (16 pins) @d9407000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50008000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank G (16 pins) @d9408000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@50009000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank H (16 pins) @d9409000
D/TC:0 0 _fdt_stm32_gpio_controller:930 Bank name gpio@5000a000
D/TC:0 0 stm32_gpio_parse_pinctrl_node:1146 Registered GPIO bank I (12 pins) @d940a000
D/TC:0 0 probe_driver_node:443 element: stm32_gpio on node pin-controller@50002000 initialized
D/TC:0 0 probe_driver_node:449 element: stm32-tamp on node tamp@5c00a000 deferred 1 time(s)
D/TC:0 0 tzc_set_driverdata:124 TZC400 Filters 2 Regions 8
D/TC:0 0 add_carved_out_nsec:382 0xc0000000 - 0xddffffff : Sec access 0 NS access 0x87fb87fb
D/TC:0 0 tzc_dump_state:473 region 0
D/TC:0 0 tzc_dump_state:476 region_base: 0x0000000000000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ffffffff
D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 1
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000de000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000dfffffff
D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_RDWR
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 2
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000c0000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ddffffff
D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 gic_it_set_cpu_mask:350 cpu_mask: writing 0xff to 0xd8621824
D/TC:0 0 gic_it_set_cpu_mask:352 cpu_mask: 0x3
D/TC:0 0 gic_it_set_prio:361 prio: writing 0x1 to 0xd8621424
D/TC:0 0 probe_driver_node:443 element: stm32mp1-tzc400 on node tzc@5c006000 initialized
D/TC:0 0 probe_driver_node:443 element: stm32-rtc on node rtc@5c004000 initialized
D/TC:0 0 probe_driver_node:443 element: stm32mp1-pwr-regu on node pwr@50001000 initialized
D/TC:0 0 probe_driver_node:443 element: stm32mp15_rstctrl on node rcc@50000000 initialized
D/TC:0 0 probe_driver_node:449 element: stm32-tamp on node tamp@5c00a000 deferred 2 time(s)
D/TC:0 0 i2c_compute_timing:455 I2C SDADEL(min/max): 18/519, SCLDEL(Min): 285
D/TC:0 0 i2c_compute_timing:553 I2C TIMINGR (PRESC/SCLDEL/SDADEL): 1/8/1
D/TC:0 0 i2c_compute_timing:555 I2C TIMINGR (SCLH/SCLL): 27/38
D/TC:0 0 i2c_compute_timing:557 I2C TIMINGR: 0x10811b26
D/TC:0 0 i2c_setup_timing:644 I2C Freq(400000Hz), Clk Source(64000000)
D/TC:0 0 i2c_setup_timing:646 I2C Rise(185) and Fall(20) Time
D/TC:0 0 i2c_setup_timing:648 I2C Analog Filter(On), DNF(0)
D/TC:0 0 add_node_to_probe:641 element: stm32_pmic on node stpmic@33
D/TC:0 0 probe_driver_node:443 element: stm32_i2c on node i2c@5c002000 initialized
D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 3 time(s)
D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 4 time(s)
D/TC:0 0 register_periph:104 Register I2C4 as non-secure
D/TC:0 0 initialize_pmic:724 PMIC version = 0x21
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul buck1: enable, 1200mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul buck2: enable, 1350mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul buck3: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul buck4: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul ldo1: disable, 1800mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul ldo2: disable, 1800mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul ldo3: enable, 1700mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul ldo4: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul ldo5: enable, 2900mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul ldo6: disable, 1000mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul vref_ddr: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul boost: disable, 5000mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul pwr_sw1: disable, 5000mV
D/TC:0 0 stpmic1_dump_regulators:1137 PMIC regul pwr_sw2: disable, 5000mV
D/TC:0 0 parse_regulator_fdt_nodes:185 No CPU supply provided
D/TC:0 0 probe_driver_node:443 element: stm32_pmic on node stpmic@33 initialized
D/TC:0 0 probe_driver_node:449 element: stm32-tamp on node tamp@5c00a000 deferred 3 time(s)
D/TC:0 0 probe_driver_node:449 element: stm32-tamp on node tamp@5c00a000 deferred 4 time(s)
D/TC:0 0 probe_driver_node:449 element: stm32-cpu-opp on node cpu0-opp-table deferred 5 time(s)
D/TC:0 0 process_probe_list:590 Unresolved dependencies after 5 rounds, 5 deferred
D/TC:0 0 probe_dt_drivers_early:774 Deferred drivers probing
D/TC:0 0 print_probe_list:397 Probe list: 2 elements
D/TC:0 0 print_probe_list:399 |- Driver stm32-tamp probes on node tamp@5c00a000
D/TC:0 0 print_probe_list:399 |- Driver stm32-cpu-opp probes on node cpu0-opp-table
D/TC:0 0 print_probe_list:403 `- Probe list end
D/TC:0 0 print_probe_list:409 Failed list: 0 elements
D/TC:0 0 print_probe_list:414 `- Failed list end
D/TC:0 0 call_initcalls:40 level 3 platform_banner()
I/TC: Platform stm32mp1: flavor PLATFORM_FLAVOR - DT stm32mp151a-stm32-computer-firmware-mx.dts
I/TC: OP-TEE ST profile: system_services
D/TC:0 0 call_initcalls:40 level 3 init_stm32mp1_calib()
D/TC:0 0 stm32mp_start_clock_calib:406 HSI clock calibration not supported
D/TC:0 0 stm32mp_start_clock_calib:408 CSI clock calibration not supported
D/TC:0 0 call_initcalls:40 level 3 verify_pseudo_tas_conformance()
D/TC:0 0 call_initcalls:40 level 3 mobj_init()
D/TC:0 0 call_initcalls:40 level 3 default_mobj_init()
D/TC:0 0 call_initcalls:40 level 3 tee_cryp_init()
D/TC:0 0 call_initcalls:40 level 4 init_console_from_dt()
E/TC:0 0 assertion 'info.reg != DT_INFO_INVALID_REG && info.reg_size != DT_INFO_INVALID_REG_SIZE' failed at core/drivers/stm32_uart.c:156 <stm32_uart_init_from_dt_node>
E/TC:0 0 Panic at core/kernel/assert.c:28 <_assert_break>
E/TC:0 0 TEE load address @ 0xde000000
E/TC:0 0 Call stack:
E/TC:0 0  0xde002679
E/TC:0 0  0xde015517
E/TC:0 0  0xde01414f
E/TC:0 0  0xde00d4eb
E/TC:0 0  0xde00355d
E/TC:0 0  0xde01602d
E/TC:0 0  0xde00243d
E/TC:0 0  0xde00019c
D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:644 nvmem part_number_otp = 1: 1 bit offset: 0, length: 8
M/TC: CPU : 0
M/TC:     usr_sp : 0x04480382
M/TC:     usr_lr : 0x1000c804
M/TC:   irq_spsr : 0x00021488
M/TC:     irq_sp : 0x48200010
M/TC:     irq_lr : 0x020a1498
M/TC:   fiq_spsr : 0x18000830
M/TC:     fiq_sp : 0x0bc61000
M/TC:     fiq_lr : 0x40000000
M/TC:   svc_spsr : 0x010a0483
M/TC:     svc_sp : 0x30001010
M/TC:     svc_lr : 0x00200501
M/TC:   abt_spsr : 0x00484800
M/TC:     abt_sp : 0x04080282
M/TC:     abt_lr : 0xc800c010
M/TC:   und_spsr : 0x24020403
M/TC:     und_sp : 0x10145010
M/TC:     und_lr : 0x09090400
M/TC:       pmcr : 0x08008004

 

 

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-Computer
DMårt
Lead

@Erwan SZYMANSKI 

I tried to add &uart4 inside the .dts file (here) of Op-tee folder inside the Device Tree folder.

I don't know if uart4 should be there. It's not generated by CubeIDE.

 

 

 

/* USER CODE BEGIN addons */
&uart4 {
	pinctrl-names = "default", "sleep", "idle";
	pinctrl-0 = <&uart4_pins_a>;
	pinctrl-1 = <&uart4_sleep_pins_a>;
	pinctrl-2 = <&uart4_idle_pins_a>;
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";
};
/* USER CODE END addons */

 

 

 

 

Here is the code snippet where it fails.

 

 

 

#ifdef CFG_EMBED_DTB
static TEE_Result init_console_from_dt(void)
{
	struct stm32_uart_pdata *pd = NULL;
	void *fdt = NULL;
	int node = 0;
	TEE_Result res = TEE_ERROR_GENERIC;

	fdt = get_embedded_dt();
	res = get_console_node_from_dt(fdt, &node, NULL, NULL);
	if (res == TEE_ERROR_ITEM_NOT_FOUND) {
		fdt = get_external_dt();
		res = get_console_node_from_dt(fdt, &node, NULL, NULL);
		if (res == TEE_ERROR_ITEM_NOT_FOUND)
			return TEE_SUCCESS;
		if (res != TEE_SUCCESS)
			return res;
	}

	pd = stm32_uart_init_from_dt_node(fdt, node); <----- Error


struct stm32_uart_pdata *stm32_uart_init_from_dt_node(void *fdt, int node)
{
	TEE_Result res = TEE_ERROR_GENERIC;
	struct stm32_uart_pdata *pd = NULL;
	struct dt_node_info info = { };
	uint32_t cfg8 = 0;

	_fdt_fill_device_info(fdt, &info, node);

	if (info.status == DT_STATUS_DISABLED)
		return NULL;

	assert(info.reg != DT_INFO_INVALID_REG &&
	       info.reg_size != DT_INFO_INVALID_REG_SIZE); <--- Error

 

 

 

https://github.com/DanielMartensson/STM32-Computer/blob/9a0f8e83b27077a08cff3159adaf190d92d70526/Firmware/STM32-Computer-Firmware/CA7/optee-os-3.19.0-r2/optee-os-stm32mp-3.19.0-stm32mp-r2/core/drivers/stm32_uart.c#L156

If we are looking at the stm32mp151.dtsi here ,of Op-tee, we can see it contains reg.

 

		uart4: serial@40010000 {
			compatible = "st,stm32h7-uart";
			reg = <0x40010000 0x400>;
			interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc UART4_K>;
			wakeup-source;
			dmas = <&dmamux1 63 0x400 0x15>,
			       <&dmamux1 64 0x400 0x11>;
			dma-names = "rx", "tx";
			resets = <&rcc UART4_R>;
			status = "disabled";
		};

 

 

In this case, reg must be 0x4001000 and reg_size must be 0x400 I guess.

So why does this error occurs?

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-Computer