2022-12-14 04:31 AM
We are using the ST32WB without making use of the BLE feature.
But we run into RAM issues and need more RAM. How can we "non-secure" the SRAM2Bb part?
SRAM2a is currently already non-secure.
Tried to do it from the CubeProgrammer, but got the error:
Error: Expected value for Option Byte "BRSD_B": 0x1, found: 0x0
As we think only CPU2 can adjust this option bytes, we suspect we need some kind of dummy firmware that free the secure section.
Solved! Go to Solution.
2022-12-22 11:59 PM
Hello @Community member ,
Thanks for your feedback,
According to RM0473 section 3.10.19, the FLASH_SRRVR register "provides write access security and can only be written by the CPU2. A write access from the CPU1 is ignored and a bus error generated. On any read access the register value is returned.
Written values are only taken into account after OBL".
So the error is expected because only CPU2 (the stack) can modify these values. From a user point of view, those OBs cannot be changed.
I hope this helps !
If your issue is solved, please close this post by clicking the "Select as Best" button. This will help other members of the community find this response more quickly 🙂
Sara.
2022-12-18 11:32 PM
Anyone?
Maybe only some pointers?
The exact MUC is STM32WB15CCU6
2022-12-22 11:59 PM
Hello @Community member ,
Thanks for your feedback,
According to RM0473 section 3.10.19, the FLASH_SRRVR register "provides write access security and can only be written by the CPU2. A write access from the CPU1 is ignored and a bus error generated. On any read access the register value is returned.
Written values are only taken into account after OBL".
So the error is expected because only CPU2 (the stack) can modify these values. From a user point of view, those OBs cannot be changed.
I hope this helps !
If your issue is solved, please close this post by clicking the "Select as Best" button. This will help other members of the community find this response more quickly 🙂
Sara.