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How to correctly dimension an external pullup resistor in Low Power application

Strooom
Senior

I'm developing a low-power device using the STM32WLE5.

To reduce power consumption of the peripherals (sensors / display / eeprom) during the sleep of the MCU, all these peripherals are switched off with a P-channel mosfet as shown in this part of the schematic

Screen Shot 02-10-25 at 09.26 PM.PNG

The enable is driven down by a GPIO when the peripheral is active.

To minimize the power consumption of the MCU during sleep, the IO's are configured as Analog inputs. The 1M pull-up resistor keeps the mosfet OFF when it's gate is not driven during sleep of the MCU.

But it's not working as expected : when the IO is configured as analog, it's not rising to 3.3V, but remains at 2.5V, too low to properly turn off the mosfet..

When I replace the 1M with 330K, it's better, but I'd like to understand why such a strong pull-up is needed ?

The GPIO in analog input mode should be very high impedance, same for the mosfet..

I could keep the GPIO in output and drive the mosfet gate even when MCU is in sleep, but AN4899 recommends them to be configured as Analog inputs to minimize power consumption.

 

Curious as what you guys think is the best solution here.

1 ACCEPTED SOLUTION

Accepted Solutions
Peter BENSCH
ST Employee

Let's do the maths:

You have a voltage drop of 0.8V at the gate-source resistor, right?
So a current of 800nA flows through this resistor, which can be explained at least in part by the leakage current of the GPIO. On the STM32WLE5 all ADC inputs are pins of type FT_, whose leakage current you can find in the data sheet, table 73: max 650nA.

Let's assume that your voltage measuring device has an input resistance of 20Mohms and measures 2.5V, then a current of 125nA flows in this measuring device, which is added to the max 650nA, resulting in a total of 775nA - not far from the 800nA that you have measured, right? Other leakage currents and tolerances are not even taken into account.

Ultimately, you must use a gate-source resistor at which the maximum leakage current does not lead to a voltage that opens the p-channel FET, whereby you should also take into account the temperature dependence of the threshold voltage of the p-channel FET.

Hope that helps?

Good luck!
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

2 REPLIES 2
Peter BENSCH
ST Employee

Let's do the maths:

You have a voltage drop of 0.8V at the gate-source resistor, right?
So a current of 800nA flows through this resistor, which can be explained at least in part by the leakage current of the GPIO. On the STM32WLE5 all ADC inputs are pins of type FT_, whose leakage current you can find in the data sheet, table 73: max 650nA.

Let's assume that your voltage measuring device has an input resistance of 20Mohms and measures 2.5V, then a current of 125nA flows in this measuring device, which is added to the max 650nA, resulting in a total of 775nA - not far from the 800nA that you have measured, right? Other leakage currents and tolerances are not even taken into account.

Ultimately, you must use a gate-source resistor at which the maximum leakage current does not lead to a voltage that opens the p-channel FET, whereby you should also take into account the temperature dependence of the threshold voltage of the p-channel FET.

Hope that helps?

Good luck!
/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Thank you. I was not aware the the ADC inputs are FT type.

So I will either choose a better resistor or may decide to keep the output activated in sleep mode. I'll do some power consumption measurements to further decide.

Thanks for your excellent advice.