Touchgfx TFT Display Flickering Issue

[Chandan Bhatia1]

Hello, I am using display TCXD050ABLON (Data sheet Attached) with STM32F746. As per datasheet I did below LTDC setting and still display is flickering badly.

Few screen shots of display setting as per datasheet is below.

Few Images of flickering display is as below.

Any suggestions?

[Martin KJELDSEN]

Could you try lowering the pixel clock in increments? The timing configuration looks okay to me based on what you've specified.

[Chandan Bhatia1]

@Martin KJELDSEN​ 

Yes I tried. At 16MHZ, it was same and at 9.8 it was white screen all time.

Also did you check LTDC polarities ? May be that is wrong.

Below are my LTDC settings:

horizontal synchronization polarity : Active Low

vertical synchronization polarity : Active Low

data enable polarity : Active Low

pixel clock polarity : Inverted Input pixel clock ( tried Input pixel clock polarity too)

Below screenshot is from datasheet:

 

I tried all Red, You can check video using below link. Manually I am turning ON/OFF display multiple times.

https://drive.google.com/file/d/1S0nl6U7TyQ7QVdnoh_vdExQBPObuPQkD/view?usp=sharing

[Chandan Bhatia1]

@Martin KJELDSEN​  Hi, Did you get the chance to check ?

[Chandan Bhatia1]

@Martin KJELDSEN​ 

Also one stupid question, When we set pixel clock polarity as input pixel clock, Does this mean DCLK is going UP or Down ? Also same question is for Horizontal Synchronization, vertical synchronization, data enable polarity with active active low.

[MM..1 · Accepted solution]

When i see your images from first post, this dont seems as ltdc trouble. Try check firstly display and ltdc without touchgfx started.

I mean your troble is SDRAM when you use external.

For test only display prepare in flash memory fullscreen image in proper format and replace address in ltdc layer config to this image.

Then in main disable starting touchgfx resp all rtos.

[Chandan Bhatia1]

@MM..1​ Thanks for the comment.

You mean something like below screenshot. Here I replaced "color frame buffer address " to background image array _background_800x480 (generated by touchgfx stored in internal flash) from SDRAM address 0xC0000000. I don't have display with me right now to validate. I will send it to factory for validation.

Why do you feel like that its might be SDRAM issue ? Just wanted to know the reason,

Also I validated external SDRAM using below code. Basically I am checking at random address at bank 1.

void validateSDRAM (void){
	uint32_t uwWriteReadStatus = 0 , BUFFER_SIZE = 100, uwIndex = 0;
	uint32_t aTxBuffer[BUFFER_SIZE] , aRxBuffer[BUFFER_SIZE];
	  /* Fill the buffer to write */
	    Fill_Buffer(aTxBuffer, BUFFER_SIZE, 0xA244250F);
 
	    /* Write data to the SDRAM memory */
	    for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
	    {
	      *(__IO uint32_t*) (0xC0000000 + 0x100 + 4*uwIndex) = aTxBuffer[uwIndex];
	    }
 
	    /* Read back data from the SDRAM memory */
	    for (uwIndex = 0; uwIndex < BUFFER_SIZE; uwIndex++)
	    {
	      aRxBuffer[uwIndex] = *(__IO uint32_t*) (0xC0000000 + 0x100 + 4*uwIndex);
	    }
 
	    /*##-3- Checking data integrity ############################################*/
 
	    for (uwIndex = 0; (uwIndex < BUFFER_SIZE) && (uwWriteReadStatus == 0); uwIndex++)
	    {
	      if (aRxBuffer[uwIndex] != aTxBuffer[uwIndex])
	      {
	        uwWriteReadStatus++;
	      }
	    }
 
	    if (!uwWriteReadStatus)
	    {
	    	SDRAM_Working = true;
	    }
}

[MM..1]

yes as you write static image data and in main add comment to line osKernelStart

 /* USER CODE END RTOS_THREADS */

 /* Start scheduler */

 //osKernelStart();

 /* We should never get here as control is now taken by the scheduler */

 /* Infinite loop */

 /* USER CODE BEGIN WHILE */

 while (1)

 {

  /* USER CODE END WHILE */

  /* USER CODE BEGIN 3 */

 }

in this config you need handle all hw init to ok display, only after this you can use TouchGFX process.

And you ask why SDRAM. TouchGFX use for output only RAM internal or external and all graphics is copied, moved handled in this RAM.

When you set ChromART D2DMA is used for manipulate and may go to timing or other conflict . Your SDRAM test dont test DMA speed transfers.

[Chandan Bhatia1]

@MM..1​  Yes issue was related to SDRAM. Actually one of bank selection line was not connected on PCB level (means only 2 bank was accessible out of 4). We fixed it and now we are not facing any issue. I was struggling with this issue from last 10 days, wondering its LTDC issue. Thanks you so much for help.

Also you was saying that SDRAM test don't test DMA speed transfers. How should I do that, kinda not sure? Anything else should I include for SDRAM test for future?

[MM..1]

PCB fail is strange ... Pls mark as best answer

And for testing i mean best method is generate little buffer in internal ram and use DMA mem2mem , fill with it full sdram and comapre calculate CRC or any checksum .

[Chandan Bhatia1]

Actually it was customized board which we made and we made this mistake during pcb design phase.