How to choose QSPI Flash(nor flash or nand flash)and ram on stm32h7b0vb is enough for custom design?

[alivexiaoluo]

Hi,

I have a project under EVT situation.

I will choose the stm32h7b0vb(128K Flash + 1.18M SRAM)as the mcu for the system.

The main functions is below：

1,Driver a tft-lcd with touch via LTDC interface,lcd size is 640*360 pixes support rgb888 and support single touch and slide.

2,Support FreeRT OS and about 10 tasks.

3,8M Bytes for sampling data record​s storage in flash and 40K SRAM for data records write and read.

4,Support DFU via ble(OTA), stm32h7b0 connect ble soc via uart.

Q1:

If the QSPI Flash is used for code storage and sampling data records storage,which one should be optimized(nor flash or nand flash)?What is the difference between the nor flash and nand flash?

Q2:

The SRAM on stm32h7b0 chip is enough for software design?

Q3:

How to design the dfu when use extern QSPI Flash for code storage?(I designed the dfu on internal flash on stm32f103re )

Thanks for your attention.

[Martin KJELDSEN · Accepted solution]

I'll answer the first two, at least.

Q1. NAND flash is not memory mapped. If TouchGFX cannot access the data in your flash using a simple pointer, then you need to cache your images using a driver that you create - This leads to performance overhead and slightly convoluted view code (because of constant caching, uncaching of images)

Q2. You can do some calculations to figure out of the SRAM on the H7b0 is enough for you. It really depends on what else you need your application to do. Example: 480*272*3=326.400 bytes for a single 24bpp application framebuffer.

/Martin

[alivexiaoluo]

Hi,Martin KJELDSEN.

So if I want ​better display effect，we should use nor flash.

I want to know if the nand flash fit for my design? Is it very inconvenient for developing TouchGFX on nand flash？

Thanks for your attention.

[Martin KJELDSEN]

It's more inconvenient than choosing a memory mapped NOR or Q/OSPI flash - No work required. But sometimes people need to use one for design or economic reasons.

[alivexiaoluo]

​Ok,Thanks for your attention.

[berendi]

> 480*272*3=326.400

I'd suggest replacing your calculator :)

[alivexiaoluo]

Hi, berendi.

​The size of the lcd is 640*360pixes, so the application framebuffer should be 640*360*3 = 691200 bytes.

If the QSPI Flash is used for code storage and sampling data records storage, which one should be optimized(nor flash or nand flash)?

I want to know if the nand flash fit for my design? Is it very inconvenient for developing TouchGFX on nand flash？

Thanks for your attention.

[Tesla DeLorean]

What kind of NAND Flash are you proposing FMC, QSPI or EMMC ?

NAND needs to operate as a file system because it generally accesses via blocks, and longer linear reads.

The QSPI will support about 256MB NOR easily, figure out if what you need actually fits.

>> Is it very inconvenient for developing TouchGFX on nand flash?

Having the compiler/linker generate and write vast amount of invariant data for each build/debug is going to be a huge time waster. If you can separate your invariant image files, and create even a simple file system / resource database, it will save a lot of time.

[alivexiaoluo]

Hi, clive1.​

Nand Flash for code storage and sampling data records storage via QSPI interface.

For my understanding, if i use nand flash for code storage, i should copy the code in nand flash to stm32h7b0vb internal sram(no extern sdram for my design)to run the code.

There are only 1.18M Bytes internal sram on the stm32h7b0vb, so I can only copy the code(functions) to internal sram for running code，not including the ui component code(if copy, the internal sram is not enough).

​And i should allocate at least 640*360*3 = 691200 bytes at stm32h7b0vb internal sram for reading the ui component in nand flash, in order to display the ui component.

I want to know my understanding is right or not?

I want to know if the IAR have the access to allocate different address for code(functions) and ui components(const data) on extern QSPI flash?

Thanks for your attention.

[alivexiaoluo]

Hi, clive1.​

I am sorry for post twice, and i have no rights to delete it.

Nand Flash for code storage and sampling data records storage via QSPI interface.

For my understanding, if i use nand flash for code storage, i should copy the code in nand flash to stm32h7b0vb internal sram(no extern sdram for my design)to run the code.

There are only 1.18M Bytes internal sram on the stm32h7b0vb, so I can only copy the code(functions) to internal sram for running code，not including the ui component code(if copy, the internal sram is not enough).

​And i should allocate at least 640*360*3 = 691200 bytes at stm32h7b0vb internal sram for reading the ui component in nand flash, in order to display the ui component.

I want to know my understanding is right or not?

I want to know if the IAR have the access to allocate different address for code(functions) and ui components(const data) on extern QSPI flash?

Thanks for your attention.