Hi,
the HW PEC generation of the I2C Interface has two limitations that i have not been able to work around until now.
- The PEC calculation is reset after a stop, but can not be initialized after start. If you want to program a SMBus Slave that is capable of reacting on a Read with Start/Stop instead of repeated Start between RX/TX (for compatibility reasons) the PEC calculation fails, because it is reset and is only calculated for the second part of the Transaction.
- The I2C_PECR register is only updated after a HW check or insertion of the PEC. If you don't know the length of a message you can not initialize the HW check for the last Byte, because you only know with the stop that it was the last byte. A software check of the PEC in a Stop ISR fails also, because the I2C_PECR register isn't updated. It still contains the value from the last transaction where HW check or insertion has been used.
Is the internal PEC register accessible to initialize it with the previous PEC instead of zero and read it at any time to allow a software check after a stop?
