2022-07-22 09:26 PM
I'm at attempting to create a driver for a HyperRAM IC based on the the s70kl1281 DK driver. Where the s70kl1281 limits its register address space to 32 bits, the chip I'm attempting to access (the W957A8MFYA5I) has a 36bit address space (or 40 bits, depending on how you read the data sheet). For example one of the register addresses is 0x0800000001U. That's at least 4 additional bits past the 32bit address space. I've attached an image of the chip's full register address space.
The maximum address space that seems to be supported by the HAL is defined as HAL_OSPI_ADDRESS_32_BITS in stm32h7xx_hal_ospi.h. Is there any methodology in the HAL API for adding additional bits to the CA bit-stream of a HyperRAM register access?
Thanks in advance for any insight.
2022-07-23 05:34 AM
Make the command wider?
2022-07-23 12:09 PM
2022-07-23 02:57 PM
The controller should allow for 8 or 16-bit command sizes. Stuff the leading 8-bit of the address into the second command byte.
2022-07-25 07:28 AM
2022-07-25 08:04 AM
Huh??
Perhaps you're looking at a different datasheet than I am, but the combined command/address is 48-bit wide, 6-bytes, so 16-bit of command (2-byte), and 32-bit of address (4-byte) should cover that entire space just fine, unless I'm missing some major plot points here. The width of the data or registers is a secondary issue addressed by the size of the data transfer, ie NbBytes
s_command.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; // Width of BUS
s_command.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; // Width of Instruction word
s_command.AddressMode = HAL_OSPI_ADDRESS_8_LINES;
s_command.AddressSize = HAL_OSPI_ADDRESS_32_BITS; // Width of Address word
2022-07-25 10:30 AM