With the stm32h7xx OSPI HAL is there a method for extending the register address space beyond 32 bits?

[JAitc.1]

I'm at attempting to create a driver for a HyperRAM IC based on the the s70kl1281 DK driver. Where the s70kl1281 limits its register address space to 32 bits, the chip I'm attempting to access (the W957A8MFYA5I) has a 36bit address space (or 40 bits, depending on how you read the data sheet). For example one of the register addresses is 0x0800000001U. That's at least 4 additional bits past the 32bit address space. I've attached an image of the chip's full register address space.

The maximum address space that seems to be supported by the HAL is defined as HAL_OSPI_ADDRESS_32_BITS in stm32h7xx_hal_ospi.h. Is there any methodology in the HAL API for adding additional bits to the CA bit-stream of a HyperRAM register access?

Thanks in advance for any insight.

[Tesla DeLorean]

Make the command wider?​

[JAitc.1]

Thanks for the reply. Could you elaborate more on what you mean? I don't see any options to do that in the CCR or WCCR registers.
Thanks
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[Tesla DeLorean]

The controller should allow for 8 or 16-bit command sizes. Stuff the leading 8-bit of the address into the second command byte.​

[JAitc.1]

That's a cool idea. The register width for the W957A8MFYA5I is 16bits. There may have been a way to make that work if this part used an 8 bit register width.
Thanks!
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[Tesla DeLorean]

Huh??

Perhaps you're looking at a different datasheet than I am, but the combined command/address is 48-bit wide, 6-bytes, so 16-bit of command (2-byte), and 32-bit of address (4-byte) should cover that entire space just fine, unless I'm missing some major plot points here. The width of the data or registers is a secondary issue addressed by the size of the data transfer, ie NbBytes

 s_command.InstructionMode  = HAL_OSPI_INSTRUCTION_8_LINES; // Width of BUS

 s_command.InstructionSize  = HAL_OSPI_INSTRUCTION_16_BITS; // Width of Instruction word

 s_command.AddressMode    = HAL_OSPI_ADDRESS_8_LINES;

 s_command.AddressSize    = HAL_OSPI_ADDRESS_32_BITS; // Width of Address word

[JAitc.1]

I see. I misunderstood what you were suggesting.
In the current driver code I'm working with, the HyperRAM commands are set up with HAL_OSPI_HyperbusCmd() which uses the OSPI_HyperbusCmdTypeDef structure. It doesn't use the Instruction or InstructionSize fields. If I want to use those fields I'd have to drop down to/mix-in calls to HAL_OSPI_Command() and, as you suggested, the OSPI_RegularCmdTypeDef command struct. That might work. I already have to rewrite most of this driver to get it to work. That might be the way to start.
Thanks
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