2023-03-01 11:27 PM
Hi there,
I'm using the chip STM32G431CBY3 and here is a strange thing. After I start the TIM15 in interrupt mode and every time the interrupt enters, the NMI_Handler enters at the same time, by checking the register, I found that SRAM_PEF bit is set in SYSCFG_CFGR2. After several times of this, the system seems to stop working.
I have done things below by using the methods mentioned in knowledge article type 'How to use SRAM Parity in your application' :
but that brings no effect.
By the way, I use CCMRAM to accelerate some functions, the CCMRAM is mapped at 0x10000000, when I remap it at 0x20005800, the problem above disappears and the code works right. I have checked the variables that DMA used, their run address are all at RAM not at CCMRAM, so I guess it's not about DMA access? If somebody knows the reason please tell me. Thanks.
2023-05-12 02:37 AM
Hi @jhu.5 ,
Sorry to come back late to this interesting case. I'm curious to know if you found an explanation.
It will be helpful if you can share some minimum project to reproduce the issue you are facing.
Thanks.
-Amel
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2023-05-22 04:42 AM
Hello @jhu.5,
You should not rely entirely on the knowledge article 'How to use SRAM Parity in your application' as it uses the NULCEO-G071RB, which differs from the STM32G431.
For instance, it is not clear how you're checking the SRAM_PEF bit since it's not a part of the SYSCFG_CFGR2 register in STM32G431.
Also, unlike the STM32G0, the SRAM size does NOT change if the parity check is enabled.
It'll be helpful to get an update from you!
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2023-05-22 05:23 AM - edited 2023-11-20 08:03 AM
> By the way, I use CCMRAM to accelerate some functions
How?
> I have checked the variables that DMA used, their run address are all at RAM not at CCMRAM, so I guess it's not about DMA access?
JW