2022-02-24 01:15 PM
RM0091 page 628/1004
document DocID018940 Rev 9.
Existing text: "The byte counter is always used in master mode. By default it is disabled in slave mode, but it can be enabled by software by setting the SBC (Slave Byte Control) bit in the I2C_CR2 register."
Should read: The byte counter is always used in master mode. By default it is disabled in slave mode, but it can be enabled by software by setting the SBC (Slave Byte Control) bit in the I2C_CR1 register."
(the SBC bit is in CR1, not CR2, and is correctly shown in section 26.7.1 Control Register 1.)
I'm new to STM32 world - is there a way to submit this as a possible document error?
Thanks!
Dave
2022-03-02 01:38 AM
Hello @wb0gaz ,
Thank you for having reported this typo.
I confirm this error, and I created an internal ticket (number 123705) in order to correct this typo in the coming release of RM0091.
PS: Internal ticket (number 123705), this is an internal tracking number and is not accessible or usable by customers).
Thanks
Imen