What might happen if GPIO pin is drived HIGH level before STM32F407 is powered on?

[Yang Yang]

Hello, ST expert

In our custom MCU board design, some GPIO pins can be drived HIGH before MCU is power on. I found that sometimes (low possibility)these GPIO pins damaged, that means these pins can not be drived high again. I am not certain it is caused by the power sequence. Is there any suggestion about this?

And by the way if VBAT pin is present and VDD is not, does GPIO part in MCU workes as VDD is present?

[gbm · Accepted solution]

Basically nothing if there is a serial resistor of at least 4k7 and a lot of bad things without it. See the I_IH_max (injection current) parameter in the datasheet. There are high chances the uC will survive anyway but nothing for sure. It also depends on the drive strength - the current supplied to the input. It should not be a big problem with non-5V-tolerant pins, be more careful with "FT" ones.

Some 8-bit uCs could even be powered by 5 V AC via their I/O pins with Vcc/GND left unconnected, but this is normally not a recommended design practice. ;)

[Yang Yang]

Hello

​As your suggestion, almost all GPIO pins of STM32F407 is "FT" ones, does that mean is that an issue if driven high before powered on?

BR

Yang

[gbm]

The series resistor makes it safe in any case. If it's slow FT input - make it at least 10k. For fast signals on FT pins, the orthodox solution would be something like 1..2k and a small Schottky diode, anode to the pin, cathode to Vdd.

[Yang Yang]

Hello, gdm

Thanks for your quick reply. I got it.

For the scene without serial resistor, another question is whether there is no damage if VBAT is always present even VDD is not present? For the picture below, it seems the I/O part works with only VBAT. Am I correct?

 

BR

Yang

[gbm]

What makes you think that? From the picture, it is clear that VBAT powers RTC and backup RAM only, and only when Vdd is not present.

[Yang Yang]

Hello, gdm

Yes you are right. I do not see it clearly.

BR