What is the use of Clock Division settings ?

[RN]

Posted on June 15, 2018 at 10:00

Hello, I am using TIM2 peripheral and many times f(DTS) is mentioned , what is that ?

also what is the purpose of clock division settings ?

does it divide the internal clock ? (CLK_INT)

#stm32f4 #timer

[waclawek.jan · Accepted solution]

Posted on June 15, 2018 at 12:49

The ETR input and the channel's inputs have digital ('de-glitch') filters on them. The input clock to these filters may be a divided version of the timer's internal clock (i.e. the one which arrives from RCC); and this field determines the division ratio for those.

JW

[RN]

Posted on June 21, 2018 at 13:59

Thanks for your reply . makes sense now .