What is the meaning of multiplexed channels of ADC's in STM32L552xx or STM32L562xx family micro controllers

[MSatish]

I stuck with ADC implementation understanding. Please help me to get this.

In STM32L5xx reference manual (RM0438), ADC main features are given as follows (Page no. 685 in RM0438 Rev7)

" Up to 2 ADCs which can operate in dual mode:

ADC1 is connected to 16 external channels + 3 internal channels

ADC2 is connected to 16 external channels"

with this, I understood that, two ADC peripherals (ADC1 and ADC2) supports 16 external channels each, so, in total they should support 32channels. Is my understanding correct? If yes, I could see only 16 GPIO pads provided on controller pins (PA0-PA7, PB0-PB1 and PC0-PC5).

Is multiplexing plays a role here? Then how could I differentiate a channels physically where there are only 16 GPIO pads are given?

[TDK · Accepted solution]

Some pins are used by both ADCs, so you won't get 32 total. The datasheet will list pin functions. You could also use CubeMX to see how many channels are able to be supported simultaneously.

On this chip, it looks like all pins are shared between the two, so it can support 16 channels total.

ADC12_IN1 means the pin is both ADC1_IN1 and ADC2_IN1.

 

[JPasc.2]

Hello,

You got it wrong. Each ADC is connected to 16 channels and these 16 channels are the same. That's why you can see 16 channels on pinout.

When you want to use the dual ADC mode, you need to be careful to not convert the same channel that the other ADC. For instance, look at the figure 144 of the reference manual :

Conversion is made on CH1 by Master ADC at the beginning. At the same time, Slave ADC converts CH16. Slave ADC cannot convert CH1 because Master ADC is doing it. It goes on and on for the rest of the converted sequence : Master ADC doesn't convert the same channel as Slave ADC in the same time