USART2 interrupt continuosly fires

[srdjan]

Posted on March 11, 2015 at 14:55

Hello all,

I have a problem with my USART2 interrupt on STM32L151.I have the USART_IT_RXNE, and USART_IT_TXE interrupts enabled on UART2. All other interrupts are disabled. The interrupt works fine until something weird occurs. It starts to trigger continuously and none of the two checks for RXNE, and TXE get processed. It seems that the reson for triggering of the interrupt is unknown. I also checked the UART registers and nothing weird is happening in there. Here is the code of my interrupt handler:uint32_t rx_in = 0;uint32_t tx_in = 0;uint32_t int_in = 0;uint32_t unknown_in = 0;uint32_t cts_in = 0;/**  * @brief  This function handles USART2 global interrupt request.  * @param  None  * @retval None  */void USART2_IRQHandler( void ){ int_in++; if ( USART_GetITStatus( USART2, USART_IT_RXNE ) != RESET ) { rx_in++; /* Read one byte from the receive data register */ unsigned char temp_buf[1]; temp_buf[0] = USART_ReceiveData( USART2 ) & 0x7F; ser_push( temp_buf, 1 ); } else if ( USART_GetITStatus( USART2, USART_IT_TXE ) != RESET ) { tx_in++; if ( USB_tx_reader != USB_tx_writer ) { char ch; ch = USB_TX_Buffer[USB_tx_reader]; /* Write one byte to the transmit data register */ USART_SendData( USART2, ch ); USB_tx_reader = ( USB_tx_reader + 1 ) % USB_OUTPUT_BUFFER_SIZE; } else { /* Disable the EVAL_COMX Transmit interrupt */ USART_ITConfig( USART2, USART_IT_TXE, DISABLE ); } } else if ( USART_GetITStatus( USART2, USART_IT_CTS ) != RESET ) { cts_in++; } else { unknown_in++; }}I have counters in the code which I check periodically. Ideally the int_in variable should be equal to rx_in+tx_in, but then I suddenly see unknown_in gets to 150.000 quickly and then I get stack overlow and various crashes.Any ideas? #stm32l151 #uart #interrupt

[waclawek.jan]

Posted on March 11, 2015 at 16:55

While I thought about the overrun, honestly, this puzzles me.

Overrun can occur only when RXNE is already set. But that causes the interrupt, which reads the status register, and in the RXNE-set branch reads the DR, which is exactly the software sequence which should clear the overrun... Am I overlooking something? JW

[Tesla DeLorean]

Posted on March 11, 2015 at 18:32

The cat's always easier to observe when it's not in the box...

This issue here is compounded by the assumption that only a single interrupt source fires at once, or within the scope of the IRQ and the code here will deliberately re-enter. There's a debugger parked over the USART.Seem to recall OVR can signal absent RXNE, not looking to prove or disprove that.If the IRQ/USART ever get into a condition where it doesn't execute the primary code paths, and increments the unknown counter, it doesn't do anything to clear the state, so it might be terminal.