2012-12-17 12:35 AM
2012-12-17 03:29 AM
To answer this particular question (Vout, low), why don't you resort to the documentation, namely Table 41 in STM32F2xx datasheet (I have rev5)?
JW PS. Please stop using digit ''1'' in place of capital letter ''I''.2012-12-17 03:48 AM
2012-12-17 11:29 AM
How about using a proper I2C level translator...?
''I just started working in a place that doesn't even have a decent logic analyzer''Don't they even have oscilloscopes? Again: it's
I
2C (upper-case letter 'I
') - not 12C.2012-12-18 01:47 AM
2012-12-18 02:46 AM
Output impedance is in the order of hundreds ohms, capacitance on SDA may be a few tens pF. It shouldn't introduce long delay when compared to SCL rate.
I would say it should work.2012-12-18 03:39 AM
More precisely, given the max. 0.4V in Table 41 is given at 8mA, the output transistor's Rds,on is roughly around 50Ohm. That's at least one order of magnitude less than a typical I2C pullup (which among other things should ensure also that those 8mA are not violated, btw.).
Now we of course have no idea of what are the parasitic capacitances of the real-world incarnation of OP's circuit, nor what are his requirements as per the I2C speed, so whether this is sufficient or not is left at his discretion. Similarly with judgement whether this solution will provide enough noise margin for his application. JW2012-12-18 04:08 AM
They don't even have working scope, probably can't measure the capacitance.
We need to estimate it somehow. STM32 says: i/o pin capacitance 5pF, let's say sensor capacitance 10pF, PCB/trace capacitance another 10pF -> 25pF total.50ohm+25pF, voltage should be quite stable after several nanoseconds, right?