Trying to identify noise on the I2C bus

[aydamzn]

I'm working on STM32G491RET on the I2C bus. I've noticed intermittent noise on SDA and sparse timing inconsistency on the SCL as pictured. Could someone advise as to the nature/cause/imact of this.

[RhSilicon]

Is breadboard being used? Or any plug-in cabling that could cause poor contact?

[ONadr.1]

These short spikes are typical of poor contact on the bus conductors. They can be caused by what RhSilicon already mentioned and also poor soldering quality of the leads. Sometimes they can be induced into the bus line when switching off the inductive load, e.g. relay.

[waclawek.jan]

What pull-ups are you using?

JW

[RhSilicon]

Waveform looks consistent with not too bad values 🤔

But since the SDA noises seem to be synchronized with SCL, it could be a port access problem, perhaps due to bare-metal code.

[MHaji.1]

Hi, It seems base on pulse figure, the signals created by your self in code, not using libraries... If yes, I recommend, using libraries like HAL... after problem solved, try your code again to finding where is problem... 

[RhSilicon]

The user can also use bare-metal code based on what HAL does.

[waclawek.jan]

Looking closer at the waveforms, the pulse are around the 9th clock, i.e. that's ACK pulled down by the slave a tad bit later than master releases SDA, and released a tad bit sooner than master re-engages SDA. This is normal.

For experimenting, I recommend to inserting a small series resistor between master+pullup and slave, so that it creates a divider such that slave pulling down SDA (or also SCL if you are interested in investigating clock stretching from master) results in a slightly-higher-than-zero-but-still-below-threshold level when observed at the master's side. The waveforms are often revelatory.

JW