Trouble with Frequency Division for PDM CLK in Stereo MEMS Microphones Setup

[maxamart]

Hello everyone,

I am using an STM32F407G-DISC1 and have a stereo configuration of MEMS microphones. I need to divide the I2S CLK, which is 1 MHz, by two for the PDM CLK. I've attempted the settings recommended in Application Note AN5027, but the frequency division is not functioning as expected (this was verified using an oscilloscope). There is only a constant low-level signal at the output.

I connect the I2S CLK to the TIM TI1FP1 input as a trigger source for external clock mode 1, and then generate the output using CH2. Does anyone know where the problem might be?

Thanks in advance. I'm also attaching screenshots of the wiring and TIM settings.

[maxamart]

I figured the problem out. The configuration in CubeMX was correct, but I had forgotten to start the PWM output for CH2 in the code. So, the problem was solved by adding HAL_TIM_PWM_Start() to the code.