2013-01-07 02:14 AM
Hello, I have works on triple ADC conversion using DMA and it works, but I don't understand why I have some misalignment. I use STM32F4-Discovery borad.
ADC config is : ADC1 : ADC2: ADC3: Channel 1 Channel 6 Channel 10 Channel 3 Channel 8 Channel 12 Channel 5 Channel 9 Channel 13 So I should have array : Channel 1 - Channel 6 - Channel 10 - Channel 3 ... As I use a array[9] all channel shoul have the same position at each time but thay move ... Can someone help me or explain me how to check the good channel in the array? NB : my code is linked. Jerome. #adc2013-01-07 01:30 PM
Both ADC EOC and DMA TC interrupts are enabled and set to the same priority. Results aren't valid until the TC interrupt. What is the EOC interrupt used for?
On the discovery board, the only channels available without possible conflict with other board hardware are 1, 2, 3, 8, 9, 11, 12, 14 & 15. Cheers, Hal2013-01-07 11:19 PM
Is it more logic to use DMA TC or ADC EOC ?
I use this two interrupt as I don't know what's the best... I do some test on this to know ADC sample rate. I am not sure about when DMA TC is active in triple mode, is it when all sequence has been transmit or when the 3 ADC channel has been send or when 1 channel is convert? I don't find a lot of informations about priority configuration. How works pre-emption priority and subpriority? Because I don't find a lot of informations about that. Is it possible that the misalignment is due to debug communication? Thanks for your help.2013-01-08 01:39 AM
Just something about priority, I read this in PM0214 :
''If multiple pending exceptions have the same priority, the pending exception with the lowest exception number takes precedence. For example, if both IRQ[0] and IRQ[1] are pending and have the same priority, then IRQ[0] is processed before IRQ[1].'' And in RM0090 I see table with column ''Position'' and column ''Priority'' and not ''Exception number'' and ''IRQ Number'' ... For me ''Position'' = ''Exception number'' and ''IRQ Number'' =''Priority'', isn't it? A read also this in PM0214 2.3.6 (Rev 1) : ''To increase priority control in systems with interrupts, the NVIC supports priority grouping. This divides each interrupt priority register entry into two fields: �? An upper field that defines the group priority �? A lower field that defines a subprioritywithin the group. Only the group priority determines preemption of interrupt exceptions. When the processor is executing an interrupt exception handler, another interrupt with the same group priority as the interrupt being handled does not preempt the handler, If multiple pending interrupts have the same group priority, the subpriority field determines the order in which they are processed. If multiple pending interrupts have the same group priority and subpriority, the interrupt with the lowest IRQ number is processed first. For information about splitting the interrupt priority fields into group priority and subpriority, see Application interrupt and reset control register (AIRCR) on page '' So I think that I have just to use command :NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
And
NVIC_InitStruct.NVIC_IRQChannel = ADC_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
NVIC_InitStruct.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
This keep my SysTick Handler at higher priority ...
2013-01-08 06:55 AM
I am not sure about when DMA TC is active in triple mode
Read 9.3.13 in the F4 Reference Manual Rev 3. Cheers, Hal2013-01-11 04:47 PM
I have edited your code to eliminate the display and interrupt code and to arrange the ADC conversion to what I thought it should be. See attached code, which includes more detailed edit comments.
As far as I can tell, the modified code runs correctly. Discovery board 3.0V, GND and resister divider signal sources were jumpered to selected pins and all signals came up in the correct array location in a debug watch window. Cheers, Hal ________________ Attachments : JeromeAKA_main.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtYj&d=%2Fa%2F0X0000000aRk%2F9paAt2JedCA5UiG4qibmJa5mNFBiWU032Ne7qX6S4Js&asPdf=false