2024-05-17 09:00 AM - edited 2024-05-17 09:15 AM
I'm encountering an issue with the update event triggering in STM32 TIM1. I have configured TIM1 to generate PWM signals and set the update event to Center-Aligned Mode 3. However, I've noticed that the update event occurs not only when the timer's counter reaches the auto-reload value (ARR), but also when it reaches zero. This is causing a problem because I specifically need the update event to occur only at ARR for triggering the ADC to sample.
In my project, I'm using TIM1 to generate PWM signals on channels CH1, CH1N, CH2, and CH2N. The CCR values for PWM generation are obtained from a DMA array. Additionally, I'm utilizing the update event to trigger the ADC, with ADC values being saved to a buffer via DMA.
I've tested other modes and observed that the PWM output works fine, but this issue arises only in Center-Aligned Mode 3. How can I ensure that the update event occurs only at ARR in this mode?
2024-05-18 02:06 AM
Don't @-invoke users in your posts to attract attention.
Which STM32 are you using?
> update event occurs not only when the timer's counter reaches the auto-reload value (ARR), but also when it reaches zero
Yes, that's exactly according to documentation:
> How can I ensure that the update event occurs only at ARR in this mode?
You can't.
Try to use Compare instead, with setting given TIMx_CCRx to the same value as ARR.
JW