2017-02-06 08:58 AM
Posted on February 06, 2017 at 17:58
I'm really stumped on this one. I have a STM32F411 chip on a Wifi module and I'm trying to get the Serial Wire Output to work. My configuration code is below. Now I can see that there's some signal on the SWO line under the oscilloscope. The signal is about 3.1V peak to peak, but biased around 0V (i.e. signal is changing between -1.5V to 1.5V). On my computer, ST-Link Utility shows nothing in the Serial Wire Viewer. My clock is configured to be 96MHz through PLL and the ST-Link automatically chooses 2MHz for the SWO frequency. However, the signal from the oscilloscope looks more like 1MHz. Any idea on how I can fix this?
/* Configure Trace Port Interface Unit */
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; // Enable access to registers
TPI->ACPR = 47; // Trace clock = HCLK/(x+1) = 2MHz
TPI->SPPR = 2; // Pin protocol = NRZ/USART
TPI->FFCR = 0x102; // TPIU packet framing enabled when bit 2 is set.
// You can use 0x100 if you only need DWT/ITM and not ETM.
/* Configure PC sampling and exception trace */
DWT->CTRL = (1 << DWT_CTRL_CYCTAP_Pos) // Prescaler for PC sampling
// 0 = x32, 1 = x512
| (0 << DWT_CTRL_POSTPRESET_Pos) // Postscaler for PC sampling
// Divider = value + 1
| (1 << DWT_CTRL_PCSAMPLENA_Pos) // Enable PC sampling
| (2 << DWT_CTRL_SYNCTAP_Pos) // Sync packet interval
// 0 = Off, 1 = Every 2^23 cycles,
// 2 = Every 2^25, 3 = Every 2^27
| (1 << DWT_CTRL_EXCTRCENA_Pos) // Enable exception trace
| (1 << DWT_CTRL_CYCCNTENA_Pos); // Enable cycle counter
DBGMCU->CR = DBGMCU_CR_TRACE_IOEN; // Enable IO trace pins
/* Configure instrumentation trace macroblock */
ITM->LAR = 0xC5ACCE55;
ITM->TCR = (1 << ITM_TCR_TraceBusID_Pos) // Trace bus ID for TPIU
| (1 << ITM_TCR_DWTENA_Pos) // Enable events from DWT
| (1 << ITM_TCR_SYNCENA_Pos) // Enable sync packets
| (1 << ITM_TCR_ITMENA_Pos); // Main enable for ITM
ITM->TPR = 0xF;
ITM->TER = 0xFFFFFFFF; // Enable all stimulus ports
Solved! Go to Solution.
2017-02-06 02:57 PM
I figured it out. As it turned out I mistakenly swapped the TDI and TDO traces on my PCB and I wasn't getting any SWO through the ST-Link because it's the wrong pin. Stupid mistakes >_<
2017-02-06 09:57 AM
Posted on February 06, 2017 at 18:57
Hi Josh
I have moved your question to the
https://community.st.com/s/topic/0TO0X000000BSqSWAW/
where someone should be able to assist you.
Thanks
2017-02-06 01:21 PM
Does the M4 even use the LAR?
What if you don't configure all this stuff? The ST-LINK Utilities should configure things based on the supplied Core MHz
How about something as minimal as this
*((u32 *)0xE0042004) |= 0x27;
2017-02-06 02:43 PM
Hey Clive,
I tried both disabling the configuration and only having that one line you provided. But then the SWO line doesn't show up on the oscilloscope anymore.
In the core_cm4.h the LAR is defined. The RM0383 page 815 shows the Lock Access Register.
Thanks,
Josh
2017-02-06 02:57 PM
I figured it out. As it turned out I mistakenly swapped the TDI and TDO traces on my PCB and I wasn't getting any SWO through the ST-Link because it's the wrong pin. Stupid mistakes >_<