STM32N6 USB device implementation questions

[flexiglass]

Hello,

I have a few questions on STM32N6 capabilities for USB after reading AN4879, AN5967 and RM0486 documents:

1. AN4879 states that to be compliant with the USB 2.0 FS electrical spec, the DP+ pin must be pulled high. Does this also hold true for when working with the integrated HS PHY for 480Mbps speeds?

2. Do OTGx_TX_RTUNE pins also need to be connected via 200 ohm resistor to VSS for Hi-Speed USB device, or is that only for USB host mode? AN5967 states that for Hi-Speed USB host in section 13.3.1, but I'm not clear about USB device.

3. AN4879 also states that for USB 2.0 FS, the clock requires to be running at 48 MHz. However, in the RM0486 document, section 14.1 (RCC main features), it says that when the USBHSPHY is used the HSE frequency must be either 19.2, 20 or 24 MHz. Is this only a requirement for USB FS that the clock needs to be at 48 MHz, and for USB HS it has to be running at 24 MHz max?

4. AN5967 states that among supported USB options for the STM32N6 is USB SuperSpeed, is that through an external PHY? Because in CubeMX I only see up to USB Hi-Speed support using the internal PHY.

In fact AN4879 (rev. 10) gets even more confusing about USB speed capabilities, with the table on page 31 where it states that STM32N6 only supports USB FS. (checkmark in column E which according to the legend in table 3 is FS not HS)

@RomainR. 

Thanks a lot in advance!

[ahsrabrifat]

In USB 2.0 Full-Speed (FS) mode, a 1.5 kΩ pull-up resistor on the D+ line is used to signal the device's presence to the host. For High-Speed (HS) mode, devices initially connect at FS and then transition to HS after a handshake. Therefore, the D+ pull-up is still required during the initial connection phase, even when using the integrated HS PHY for 480 Mbps speeds. https://www.st.com/resource/en/application_note/an4879-introduction-to-usb-hardware-and-pcb-guidelines-using-stm32-mcus-stmicroelectronics.pdf

[FBL · Accepted solution]

Hi @flexiglass 

1. answered by @ahsrabrifat 
2. Type-A connector is only available for host mode
3. For STM32N6, when the USBHSPHY is used, the HSE frequency must be either 19.2, 20 or 24 MHz (max). The selection of the OTGPHY reference clock frequency for HS PHY clock selection, you need to refer to FSEL bit field in USBPHYC_CR. For FS/LS PHY clock select, you can configure FSLSPCS[1:0] bit field in OTG_HCFG. 
4. Unfortunately, this is big error, we are sorry for the confusion. An internal ticket is submitted to dedicated team ( 205520).

Thank you for reporting the incoherency in AN4879. An internal ticket is submitted to dedicated team (205519).

[flexiglass]

Thank you very much @ahsrabrifat and @FBL !