2023-11-08 08:30 AM
I have an STM32L452 rigged to use an external clock so we can keep the RTC running. Schematic attached.
X2 is a clock from SiTime, programmed to be 32.768kHz. C36 is a supercap acting as battery backup. I used STMCube to generate the startup code to feed into HAL_RCC_OscConfig. When I debug into this function, the LSE never becomes ready (RCC_BDCR_LSERDY bit always zero), and so the code returns HAL_TIMEOUT.
Do I have the correct circuit? Have I set the clock config correctly? It's the same if I run on a Nucleo board.
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 2;
RCC_OscInitStruct.PLL.PLLN = 36;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
Solved! Go to Solution.
2023-11-16 12:16 AM
Turns out that the wrong clock chip had been fitted - they'd used the low-power variant, so the swing on the clock signal was not sufficient for the processor to detect.
2023-11-08 08:59 AM
Did you select BYPASS option in LSE configuration? I guess not -> check and correct.
2023-11-08 09:07 AM
where is the vbat power coming from ?? CPHxx is a big cap - and empty. needs some diode or so from vdd -> cap, to charge it. otherwise the 32khz osc never gets power.
2023-11-08 09:25 AM
I've tried LSE ON and LSE BYPASS; both give the same result.
2023-11-08 09:32 AM
My colleagure assures me he can see the 32768Hz clock on a scope. I use VBAT output to pwoer the supercap thus:
// Enable VBat output, which allows supercap to charge and external 32.678 clock to run
// thereby keeping RTC correct in 12v power loss
//
// Bit 9 VBRS: VBAT battery charging resistor selection
// 0: Charge VBAT through a 5 kOhms resistor
// 1: Charge VBAT through a 1.5 kOhms resistor
// Bit 8 VBE: VBAT battery charging enable
// 0: VBAT battery charging disable
// 1: VBAT battery charging enable
PWR->CR4 |= PWR_CR4_VBRS_Msk; // use 1.5kOhms, gives 3.02v out
PWR->CR4 |= PWR_CR4_VBE_Msk; // enable output
2023-11-08 09:51 AM
ok, so cap is charged by cpu internal 1k5.
so maybe you have to wait more time, until 32k osc signal "ok" .
or/and reset restart rtc , when signal "ok".
see .. about problems with rtc, when vbat was too low...
http://www.efton.sk/STM32/gotcha/index.html
2023-11-08 10:24 AM
Where you place PWR->CR4 lines? Have you enabled PWR clk before?
2023-11-08 11:10 AM
At register level, it should be both, LSI_ON | LSI_BYPASS, not just one of them. In CubeMX - select Bypass option for LSE
2023-11-08 11:19 AM
The PWR->CR4 lines are between the call to HAL_Init(), and the call to SystemClock_Config() which sets up the osc.
2023-11-08 11:20 AM
Even when the timeout is set at 10 seconds, it still times out.