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STM32L432KC UFQFPN32 - CK_IN pin function poorly explained/documented

I'm finding the documentation to be lacking.

How does PA0 interact with CK_IN? Am I supposed to set PA0 as an Analogue Input?

How is CK_IN connected to OSC_IN?

How am I supposed to use this? HSE_BYPASS ?

The "clock detector" in the Clock tree of the data sheet is not further explained, presumably it flags HSERDY, but it lacks clarity.

I will note my first try with HSE_BYPASS resulted in my board not starting, perhaps dying silently in Error_Handler(), Debugger connectivity not an option right now.

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13 REPLIES 13
T J
Lead

Tim16 Options.

> I didn't see the HSE/32 option for TIM16, I'll look at it again. Perhaps via RTC clocking from HSE divided down.

0690X000006CFmDQAW.png

If the footnote is true, it's not very useful if you intend to use RTC too.

In the "Big Orca" 'L4 RM0351 rev.5 there is no such note (the HSE/32 is said to be connected to TIM17 there).

JW

More crappy documentation, the section describing this functionality for the upper bit patterns is missing. The bits are described in the STM32L432xx.h file and the related TIM HAL/LL files via a #ifdef

0690X000006CG0ZQAW.jpg

On other plaforms this is called RTCCLK, because it is only technically HSE/32 under specific conditions. Arrgghh!!

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> On other plaforms

What do you mean by other platforms here?

Do you think the 0b101 setting in TIM16_OR1 does not connect specifically to HSE/32, but to the output RTC-clock mux controlled by RCC_BDCR.RTCSEL? That's what is called RTCCLK in 6.2.13 RTC clock and also in the RTC chapter.

The problem with crappy documentation is, that if you dig deeper, you don't find answers, just more questions...

JW