[STM32L4] timer interrupt starts immediately

[Noyb]

Posted on October 04, 2016 at 13:07

Hi, using TIM1 to get a simple 1ms delay (MCU@24MHz, PSC=24, ARR=1000) the interrupt triggers almost as soon as I set CR1:CEN=1.

I've found that I'm not the only one having this problem, have followed the advice given here and there, but still no luck. 1- Start peripheral (RCC) 2- Reset peripheral 3- Set registers (SR, CR1, SMCR, BDTR, CNT, ARR, PSC) 4- Do some read back to ensure propagation 5- Tried the EGR:UG=1 trick 6- Tried the CR1:URS=1 trick 7- Interrupt is cleared at the beginning of the ISR 8- Start the timer, interrupt triggers within 50us (about 1200 cycles) This is rather hard to get this thing working without deploying a whole army. #stm32l4-timer-interrupt-spurious #stm32l4-timer-interrupt-spurious #stm32l4-timer-interrupt-spurious #stm32l4-timer-interrupt-spurious #stm32l4-timer-interrupt-spurious

[waclawek.jan]

Posted on October 04, 2016 at 13:24

Which interrupt?

Post code. JW

[Noyb]

Posted on October 04, 2016 at 14:11

Can' post code, too complicated, not MX stuff, scattered all over several files.

1- RCC->APB2ENR |= RCC_APB2ENR_TIM1EN 2- RCC->APB2RSTR |= RCC_APB2RSTR_TIM1RST 3- RCC->APB2RSTR &= ~RCC_APB2RSTR_TIM1RST 4- TIM->CR1 |= (TIM_CR1_URS) (trick ?) 5- TIM->SR = 0, tim_sr = TIM->SR (read back) 6- TIM->CR1 = 0 7- TIM->SMCR = 0 8- TIM->BDTR = TIM_BDTR_MOE 9- TIM->CNT = 0 10- TIM->ARR = 1000 - 1 (1000us) 11- TIM->PSC = 24 - 1, tim_psc = TIM->PSC (read back) 12- TIM->RCR = 0 13- TIM->EGR &= TIM_EGR_UG (trick ?) 14- TIM->DIER = TIM_DIER_UIE 15- NVIC_ClearPendingIRQ(TIM1_UP_TIM16_IRQn) & (TIM1_CC_IRQn) 16- NVIC_SetPriority(TIM1_UP_TIM16_IRQn) & (TIM1_CC_IRQn) 17- NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn) & (TIM1_CC_IRQn) -> could triggers here 18- TIM->CR1 &= ~(TIM_CR1_URS) (trick ?) 19- TIM->CR1 |= (TIM_CR1_OPM) 20- TIM->SR = 0, tim_sr = TIM->SR (yeah, to be sure) 21- TIM->CR1 |= (TIM_CR1_CEN) 22- Boom! after 50us instead of 1000us :\

[waclawek.jan]

Posted on October 04, 2016 at 14:26

> TIM->EGR &= TIM_EGR_UG (trick ?)

No, this won't do the trick. You need to *set* TIM_EGR.UG. JW

[waclawek.jan]

Posted on October 04, 2016 at 15:43

> TIM->EGR &= TIM_EGR_UG (trick ?)

No, this won't do the trick. You need to *set* TIM_EGR.UG. JW

[Noyb]

Posted on October 04, 2016 at 15:49

Could you post your correction to my code flow?

[waclawek.jan]

Posted on October 04, 2016 at 16:05

> Could you post your correction to my code flow?

>>> TIM->EGR &= TIM_EGR_UG (trick ?)

>> No, this won't do the trick. You need to *set* TIM_EGR.UG.

TIM->EGR = TIM_EGR_UG;

JW

[Noyb]

Posted on October 04, 2016 at 16:45

Nope, doesn't work, already tried that.

It appears that the counter doesn't even start counting when CR1:CEN=1 because when reading CNT it remains at 0. However the interrupt is triggered just after that. When using TIM3 CH4 for PWM, no problem, CNT runs fine after CR1:CEN=1 :\

[waclawek.jan]

Posted on October 04, 2016 at 17:07

> Nope, doesn't work, already tried that.

WHAT doesn't work? What did you try already? > It appears that the counter doesn't even start counting when CR1:CEN=1 because when reading CNT it remains at 0. Reading how? Can't this be because of the one-pulse mode you set? Create a simple but complete, compilable example reproducing the problem, and post that.

[Noyb]

Posted on October 05, 2016 at 12:04 The original post was too long to process during our migration. Please click on the provided URL to read the original post. https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I6ke&d=%2Fa%2F0X0000000buc%2FIvtdbxP5krhSW3eBRJvPcph8tT17N3ek3ygUIMXhWgU&asPdf=false