STM32L053R8 IWDG freeze in stop mode

krishnakumar · ‎2016-10-25

Posted on October 25, 2016 at 15:24

Hi,

I've implemented the IWDG for STM32L053R8 board and want to know if IWDG can be freezed in Low power STOP mode? I tried programming Flash option bit register, user configuration bit but still see IWDG resetting system in STOP mode.

#stm32l0 #programming #iwdg #stm32l053r8-nucleo #stop-mode

slimen · ‎2016-10-25

Posted on October 25, 2016 at 15:39

Hello,

In STOP mode, once the watchdog is enabled, then it cannot be disabled again except by a reset.

According to the reference manual

http://www.st.com/content/ccc/resource/technical/document/reference_manual/2f/b9/c6/34/28/29/42/d2/DM00095744.pdf/files/DM00095744.pdf/jcr:content/translations/en.DM00095744.pdf

: ''the IWDG is started by writing to its Key register or by hardware option. Once started it cannot be stopped except by a Reset.''

Refer to Section 25.3: IWDG functional description in Section 25: Independent watchdog (IWDG).

Regards

krishnakumar · ‎2016-10-25

Posted on October 25, 2016 at 17:05

Thank you for pointing out the correct information. Can we freeze WWDG in stop mode? Going by the manual it seems even WWDG can't be disabled:

26.3.1 Enabling the watchdog The watchdog is always disabled after a reset. It is enabled by setting the WDGA bit in the WWDG_CR register, then it cannot be disabled again except by a reset.

If none of the watchdogs can be used with STOP mode then how to handle system faults for applications which go to low power mode by placing core in STOP mode periodically?

Jaroslav BECKA · ‎2016-12-19

Posted on December 19, 2016 at 13:04

One of the differences between WWDG and IWDG is that IWDG has independent clock. The WWDG is clocked from APB bus whose frequency is derived from the core clock (SYSCLK). Due to the fact that the core clock is stopped in STOP mode the WWDG clock is stopped as well. This means it is automatically stopped in STOP low-power mode and you don't have to refresh it. With IWDG you would have to wake-up regularly and refresh it. Microcontrollers from

STM32L4 family allow to stop also IWDG in STOP mode (by setting corresponding option byte).