STM32L010K4 code protection

[dc_stm]

Hello All,

I want to protect my code from reading by strangers using STM programmers. But I also I do not want to protect EEPROM. Because I am downloading Software verison and revision info to EEPROM incase I need to re-program IC.

I am using STM32L010K4 ic.

I read reference manual and check HAL library for flash but I could not get how I should perform such task.

On reference manual there is FLASH_OPTR register and FLASH_WRPROT1 register. I guess with those registers I can do such a thing.

For OPTR register

BIT31 nBOOT1

BIT30 nBOOT0

BIT29 nBOOT_SEL

BIT22 nRST_STDBY

BIT21 nRST_STOP

BIT20 WDG_SW

BIT16:19 BOR_LEV

BIT8 WPRMOD

BOT0:7 RDPROT

on HAL libraries ;

#define FLASH_OPTR_RDPROT_Pos (0U)
#define FLASH_OPTR_WPRMOD_Pos (8U)
#define FLASH_OPTR_BOR_LEV_Pos (16U)
#define FLASH_OPTR_IWDG_SW_Pos (20U)
#define FLASH_OPTR_nRST_STOP_Pos (21U)
#define FLASH_OPTR_nRST_STDBY_Pos (22U)
#define FLASH_OPTR_USER_Pos (20U)
#define FLASH_OPTR_BOOT1_Pos (31U)

Where is BIT29, and BIT30 of datasheet?

On HAl libraries there are structures called FLASH_OBProgramInitTypeDef and FLASH_AdvOBProgramInitTypeDef

FLASH_OBProgramInitTypeDef, has members

uint32_t OptionType; can be value of

#define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration
#define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration
#define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration
#define OPTIONBYTE_BOR (0x08U) /*!<BOR option byte configuration
#define OPTIONBYTE_BOOT_BIT1 (0x10U) /*!< BOOT PIN1 option byte configuration

uint32_t WRPState; can be value of

#define OB_WRPSTATE_DISABLE (0x00U) 
#define OB_WRPSTATE_ENABLE (0x01U)

uint32_t WRPSector;

#define OB_WRP_Pages0to31 (0x00000001U) /* Write protection of Sector0
#define OB_WRP_Pages32to63 (0x00000002U) /* Write protection of Sector1
#define OB_WRP_Pages64to95 (0x00000004U) /* Write protection of Sector2
#define OB_WRP_Pages96to127 (0x00000008U) /* Write protection of Sector3

uint8_t RDPLevel;

#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
#define OB_RDP_LEVEL_1 ((uint8_t)0xBB)
#define OB_RDP_LEVEL_2 ((uint8_t)0xCC)

uint8_t BORLevel;

#define OB_BOR_LEVEL1 ((uint8_t)0x08) 
#define OB_BOR_LEVEL2 ((uint8_t)0x09) 
#define OB_BOR_LEVEL3 ((uint8_t)0x0A) 
#define OB_BOR_LEVEL4 ((uint8_t)0x0B) 
#define OB_BOR_LEVEL5 ((uint8_t)0x0C)

uint8_t USERConfig;

#define OB_IWDG_SW ((uint8_t)0x10) 
#define OB_IWDG_HW ((uint8_t)0x00) 
#define OB_STDBY_NORST ((uint8_t)0x40) 
#define OB_STDBY_RST ((uint8_t)0x00) 
#define OB_STOP_NORST ((uint8_t)0x20) 
#define OB_STOP_RST ((uint8_t)0x00)

uint8_t BOOTBit1Config;

#define OB_BOOT_BIT1_RESET (uint8_t)(0x00)
#define OB_BOOT_BIT1_SET (uint8_t)(0x01)

I can not fill in the gaps between HAL and real register names and descriptions

[Danish1]

There isn't a readout-protection level where you grant access to EEPROM but block access to FLASH.

In terms of understanding what's available, you should refer to the Reference Manual. HAL might not have a full set of calls to do everything, and in my opinion it is poorly documented.

In terms of discovering what version you have on a code-protected device, one approach might be to use a pin as a serial-port, and pump out version information shortly after power-up. Which pin? As you plan to do firmware upgrade, I assume you have arranged to make connection to the SWD pins. If there isn't a hardware UART routed to those pins, you might have to bit-bang the serial-port using a timer.

[Andreas Bolsch]

Either use PCROP feature (but that complicates firmware built considerably) or RDP level 1, and have your firmware copy the relavant data from EEPROM to a dedicated part of RAM right after reset. RAM remains readable even if RDP level 1 is set and debugger connected *after* the copy took place.

[dc_stm]

Hello,

I can not debug with LEVEL1 enabled. or read RAM. how can I read or debug with LEVEL 1

[Pavel A.]

Try debug connection in "hot plug" mode. Then you can see the part of RAM and other components not protected by RDP.